Lines Matching refs:cur_target
513 param->syncreg = data->cur_target->syncreg;
514 param->ackwidth = data->cur_target->ackwidth;
516 param->sample_reg = data->cur_target->sample_reg;
518 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
669 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
680 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
685 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
835 data->cur_target = &(data->target[newid]);
975 data->cur_target = target;
1533 data->cur_target = NULL;
1628 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1633 nsp32_set_async(data, data->cur_target);
1634 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1635 data->cur_target->sync_flag |= SDTR_DONE;
1636 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1652 nsp32_set_async(data, data->cur_target);
1654 data->cur_target->sync_flag &= ~SDTR_TARGET;
1655 data->cur_target->sync_flag |= SDTR_DONE;
1863 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1871 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1876 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1881 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2037 if (data->cur_target->sync_flag &
2044 nsp32_set_async(data, data->cur_target);
2045 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2046 data->cur_target->sync_flag |= SDTR_DONE;
2221 nsp32_target *target = data->cur_target;
2581 data->cur_target = NULL;
2821 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2823 data->cur_target->sync_flag = 0;
2824 nsp32_set_async(data, data->cur_target);