Lines Matching refs:ras_fwlog
6316 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6319 ras_fwlog->state = INACTIVE;
6340 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6343 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6345 &ras_fwlog->fwlog_buff_list,
6355 if (ras_fwlog->lwpd.virt) {
6358 ras_fwlog->lwpd.virt,
6359 ras_fwlog->lwpd.phys);
6360 ras_fwlog->lwpd.virt = NULL;
6364 ras_fwlog->state = INACTIVE;
6383 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6388 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6391 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6393 &ras_fwlog->lwpd.phys,
6395 if (!ras_fwlog->lwpd.virt) {
6402 ras_fwlog->fw_buffcount = fwlog_buff_count;
6403 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6424 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6447 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6452 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6463 ras_fwlog->ras_hwsupport = false;
6468 ras_fwlog->state = ACTIVE;
6494 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6502 ras_fwlog->state = INACTIVE;
6513 if (!ras_fwlog->lwpd.virt) {
6531 ras_fwlog->fw_loglevel = fwlog_level;
6539 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
6543 ras_fwlog->fw_loglevel);
6545 ras_fwlog->fw_buffcount);
6550 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
6561 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
6562 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
6565 ras_fwlog->state = REG_INPROGRESS;