Lines Matching refs:sli4_hba
872 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
875 list_remove_head(&phba->sli4_hba.sp_queue_event,
976 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1051 spin_lock(&phba->sli4_hba.sgl_list_lock);
1053 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1056 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1057 &phba->sli4_hba.lpfc_els_sgl_list);
1060 spin_unlock(&phba->sli4_hba.sgl_list_lock);
1067 qp = &phba->sli4_hba.hdwq[idx];
1090 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1091 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1093 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1249 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1256 idle_stat = &phba->sli4_hba.idle_stat[i];
1308 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1315 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1325 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1338 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1820 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1896 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
1900 phba->sli4_hba.u.if_type0.UERRLOregaddr,
1903 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
1915 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
1916 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1938 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
1963 phba->sli4_hba.u.if_type2.STATUSregaddr,
1969 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
1973 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
1974 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2276 (phba->sli4_hba.pport_name_sta ==
2286 (phba->sli4_hba.pport_name_sta ==
3136 qp = &phba->sli4_hba.hdwq[0];
3171 qp = &phba->sli4_hba.hdwq[0];
3210 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3211 phba->sli4_hba.io_xri_cnt);
3217 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3232 qp = &phba->sli4_hba.hdwq[j];
3240 qp = &phba->sli4_hba.hdwq[i];
3303 qp = &phba->sli4_hba.hdwq[i];
3397 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3676 qp = &phba->sli4_hba.hdwq[idx];
3737 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
3739 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
3742 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3774 spin_lock(&phba->sli4_hba.sgl_list_lock);
3776 &phba->sli4_hba.lpfc_els_sgl_list);
3777 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3779 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
3781 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
3784 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
3787 spin_lock(&phba->sli4_hba.sgl_list_lock);
3788 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
3801 &phba->sli4_hba.lpfc_els_sgl_list);
3802 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3808 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
3814 &phba->sli4_hba.lpfc_els_sgl_list, list) {
3825 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3861 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
3862 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
3864 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
3867 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
3899 spin_lock(&phba->sli4_hba.sgl_list_lock);
3901 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3902 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3904 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
3906 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
3909 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
3912 spin_lock(&phba->sli4_hba.sgl_list_lock);
3913 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
3926 &phba->sli4_hba.lpfc_nvmet_sgl_list);
3927 spin_unlock(&phba->sli4_hba.sgl_list_lock);
3933 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
3939 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
3950 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
3970 qp = &phba->sli4_hba.hdwq[idx];
4028 qp = phba->sli4_hba.hdwq;
4037 qp = &phba->sli4_hba.hdwq[idx];
4080 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4081 phba->sli4_hba.io_xri_max = io_xri_max;
4086 phba->sli4_hba.io_xri_cnt,
4087 phba->sli4_hba.io_xri_max);
4091 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4093 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4094 phba->sli4_hba.io_xri_max;
4106 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4112 phba->sli4_hba.io_xri_cnt = cnt;
4125 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4160 phba->sli4_hba.io_xri_cnt = 0;
4225 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4236 phba->sli4_hba.io_xri_cnt++;
4410 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4692 phba->sli4_hba.intr_enable = 0;
4867 if (phba->sli4_hba.link_state.logical_speed)
4869 phba->sli4_hba.link_state.logical_speed;
4871 link_speed = phba->sli4_hba.link_state.speed;
5014 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5025 phba->sli4_hba.link_state.speed =
5028 phba->sli4_hba.link_state.duplex =
5030 phba->sli4_hba.link_state.status =
5032 phba->sli4_hba.link_state.type =
5034 phba->sli4_hba.link_state.number =
5036 phba->sli4_hba.link_state.fault =
5038 phba->sli4_hba.link_state.logical_speed =
5045 phba->sli4_hba.link_state.speed,
5046 phba->sli4_hba.link_state.topology,
5047 phba->sli4_hba.link_state.status,
5048 phba->sli4_hba.link_state.type,
5049 phba->sli4_hba.link_state.number,
5050 phba->sli4_hba.link_state.logical_speed,
5051 phba->sli4_hba.link_state.fault);
5168 phba->sli4_hba.link_state.speed =
5172 phba->sli4_hba.link_state.logical_speed =
5209 phba->sli4_hba.link_state.speed,
5210 phba->sli4_hba.link_state.logical_speed,
5262 phba->sli4_hba.link_state.speed =
5265 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
5266 phba->sli4_hba.link_state.topology =
5268 phba->sli4_hba.link_state.status =
5270 phba->sli4_hba.link_state.type =
5272 phba->sli4_hba.link_state.number =
5274 phba->sli4_hba.link_state.fault =
5279 phba->sli4_hba.link_state.logical_speed = 0;
5280 else if (!phba->sli4_hba.conf_trunk)
5281 phba->sli4_hba.link_state.logical_speed =
5288 phba->sli4_hba.link_state.speed,
5289 phba->sli4_hba.link_state.topology,
5290 phba->sli4_hba.link_state.status,
5291 phba->sli4_hba.link_state.type,
5292 phba->sli4_hba.link_state.number,
5293 phba->sli4_hba.link_state.logical_speed,
5294 phba->sli4_hba.link_state.fault);
5318 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5328 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
5331 switch (phba->sli4_hba.link_state.status) {
5353 if (phba->sli4_hba.link_state.status ==
5450 switch (phba->sli4_hba.lnk_info.lnk_no) {
5480 phba->sli4_hba.lnk_info.lnk_no);
5485 if (phba->sli4_hba.lnk_info.optic_state == status)
5543 phba->sli4_hba.lnk_info.optic_state = status;
5942 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
5943 phba->sli4_hba.link_state.logical_speed =
5948 phba->sli4_hba.link_state.logical_speed);
5969 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
5970 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
5971 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
5973 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
6010 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
6012 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
6557 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
6558 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
6559 phba->sli4_hba.curr_disp_cpu = 0;
6622 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
6623 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
6627 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
6628 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
6629 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
6630 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
6631 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
6635 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
6636 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
6637 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
6638 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
6645 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
6647 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
6649 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
6651 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
6653 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
6656 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
6657 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
6658 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
6668 phba->sli4_hba.lnk_info.optic_state = 0xff;
6676 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
6705 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
6741 phba->sli4_hba.wwnn.u.name = wwn;
6746 phba->sli4_hba.wwpn.u.name = wwn;
6772 phba->sli4_hba.num_present_cpu;
6774 phba->sli4_hba.num_present_cpu;
6792 &phba->sli4_hba.sli_intf);
6794 &phba->sli4_hba.sli_intf);
6795 if (phba->sli4_hba.extents_in_use &&
6796 phba->sli4_hba.rpi_hdrs_in_use) {
6982 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
6985 if (!phba->sli4_hba.hba_eq_hdl) {
6993 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
6996 if (!phba->sli4_hba.cpu_map) {
7004 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
7005 if (!phba->sli4_hba.eq_info) {
7012 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
7013 sizeof(*phba->sli4_hba.idle_stat),
7015 if (!phba->sli4_hba.idle_stat) {
7023 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
7024 if (!phba->sli4_hba.c_stat) {
7053 kfree(phba->sli4_hba.idle_stat);
7056 free_percpu(phba->sli4_hba.eq_info);
7058 kfree(phba->sli4_hba.cpu_map);
7060 kfree(phba->sli4_hba.hba_eq_hdl);
7097 free_percpu(phba->sli4_hba.eq_info);
7099 free_percpu(phba->sli4_hba.c_stat);
7101 kfree(phba->sli4_hba.idle_stat);
7104 kfree(phba->sli4_hba.cpu_map);
7105 phba->sli4_hba.num_possible_cpu = 0;
7106 phba->sli4_hba.num_present_cpu = 0;
7107 phba->sli4_hba.curr_disp_cpu = 0;
7108 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
7111 kfree(phba->sli4_hba.hba_eq_hdl);
7343 spin_lock(&phba->sli4_hba.sgl_list_lock);
7344 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
7345 spin_unlock(&phba->sli4_hba.sgl_list_lock);
7366 spin_lock(&phba->sli4_hba.sgl_list_lock);
7367 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
7368 spin_unlock(&phba->sli4_hba.sgl_list_lock);
7382 phba->sli4_hba.nvmet_xri_cnt = 0;
7397 size *= phba->sli4_hba.max_cfg_param.max_xri;
7399 phba->sli4_hba.lpfc_sglq_active_list =
7401 if (!phba->sli4_hba.lpfc_sglq_active_list)
7417 kfree(phba->sli4_hba.lpfc_sglq_active_list);
7432 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
7433 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
7434 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
7435 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
7438 phba->sli4_hba.els_xri_cnt = 0;
7441 phba->sli4_hba.io_xri_cnt = 0;
7464 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
7465 if (!phba->sli4_hba.rpi_hdrs_in_use)
7467 if (phba->sli4_hba.extents_in_use)
7506 if (!phba->sli4_hba.rpi_hdrs_in_use)
7508 if (phba->sli4_hba.extents_in_use)
7512 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
7520 curr_rpi_range = phba->sli4_hba.next_rpi;
7560 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
7561 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
7588 if (!phba->sli4_hba.rpi_hdrs_in_use)
7592 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
7601 phba->sli4_hba.next_rpi = 0;
7656 kfree(phba->sli4_hba.hdwq);
8001 if (!phba->sli4_hba.PSMPHRregaddr)
8006 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
8043 &phba->sli4_hba.sli_intf),
8045 &phba->sli4_hba.sli_intf),
8047 &phba->sli4_hba.sli_intf),
8049 &phba->sli4_hba.sli_intf),
8051 &phba->sli4_hba.sli_intf),
8053 &phba->sli4_hba.sli_intf));
8060 &phba->sli4_hba.sli_intf);
8063 phba->sli4_hba.ue_mask_lo =
8064 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
8065 phba->sli4_hba.ue_mask_hi =
8066 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
8068 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
8070 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
8071 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
8072 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
8083 phba->sli4_hba.ue_mask_lo,
8084 phba->sli4_hba.ue_mask_hi);
8091 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
8096 readl(phba->sli4_hba.u.if_type2.
8099 readl(phba->sli4_hba.u.if_type2.
8134 phba->sli4_hba.u.if_type0.UERRLOregaddr =
8135 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
8136 phba->sli4_hba.u.if_type0.UERRHIregaddr =
8137 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
8138 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
8139 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
8140 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
8141 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
8142 phba->sli4_hba.SLIINTFregaddr =
8143 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
8146 phba->sli4_hba.u.if_type2.EQDregaddr =
8147 phba->sli4_hba.conf_regs_memmap_p +
8149 phba->sli4_hba.u.if_type2.ERR1regaddr =
8150 phba->sli4_hba.conf_regs_memmap_p +
8152 phba->sli4_hba.u.if_type2.ERR2regaddr =
8153 phba->sli4_hba.conf_regs_memmap_p +
8155 phba->sli4_hba.u.if_type2.CTRLregaddr =
8156 phba->sli4_hba.conf_regs_memmap_p +
8158 phba->sli4_hba.u.if_type2.STATUSregaddr =
8159 phba->sli4_hba.conf_regs_memmap_p +
8161 phba->sli4_hba.SLIINTFregaddr =
8162 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
8163 phba->sli4_hba.PSMPHRregaddr =
8164 phba->sli4_hba.conf_regs_memmap_p +
8166 phba->sli4_hba.RQDBregaddr =
8167 phba->sli4_hba.conf_regs_memmap_p +
8169 phba->sli4_hba.WQDBregaddr =
8170 phba->sli4_hba.conf_regs_memmap_p +
8172 phba->sli4_hba.CQDBregaddr =
8173 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
8174 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
8175 phba->sli4_hba.MQDBregaddr =
8176 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
8177 phba->sli4_hba.BMBXregaddr =
8178 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8181 phba->sli4_hba.u.if_type2.EQDregaddr =
8182 phba->sli4_hba.conf_regs_memmap_p +
8184 phba->sli4_hba.u.if_type2.ERR1regaddr =
8185 phba->sli4_hba.conf_regs_memmap_p +
8187 phba->sli4_hba.u.if_type2.ERR2regaddr =
8188 phba->sli4_hba.conf_regs_memmap_p +
8190 phba->sli4_hba.u.if_type2.CTRLregaddr =
8191 phba->sli4_hba.conf_regs_memmap_p +
8193 phba->sli4_hba.u.if_type2.STATUSregaddr =
8194 phba->sli4_hba.conf_regs_memmap_p +
8196 phba->sli4_hba.PSMPHRregaddr =
8197 phba->sli4_hba.conf_regs_memmap_p +
8199 phba->sli4_hba.BMBXregaddr =
8200 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
8223 phba->sli4_hba.PSMPHRregaddr =
8224 phba->sli4_hba.ctrl_regs_memmap_p +
8226 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8228 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8230 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
8234 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8236 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8238 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8240 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8242 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
8271 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8274 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8277 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8280 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
8281 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8283 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
8335 phba->sli4_hba.bmbx.dmabuf = dmabuf;
8336 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
8338 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
8340 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
8351 dma_address = &phba->sli4_hba.bmbx.dma_address;
8352 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
8357 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
8378 phba->sli4_hba.bmbx.bmbx_size,
8379 phba->sli4_hba.bmbx.dmabuf->virt,
8380 phba->sli4_hba.bmbx.dmabuf->phys);
8382 kfree(phba->sli4_hba.bmbx.dmabuf);
8383 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
8514 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
8515 phba->sli4_hba.lnk_info.lnk_tp =
8517 phba->sli4_hba.lnk_info.lnk_no =
8521 phba->sli4_hba.lnk_info.lnk_tp,
8522 phba->sli4_hba.lnk_info.lnk_no);
8529 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
8532 phba->sli4_hba.conf_trunk =
8534 phba->sli4_hba.extents_in_use =
8536 phba->sli4_hba.max_cfg_param.max_xri =
8540 phba->sli4_hba.max_cfg_param.max_xri > 512)
8541 phba->sli4_hba.max_cfg_param.max_xri = 512;
8542 phba->sli4_hba.max_cfg_param.xri_base =
8544 phba->sli4_hba.max_cfg_param.max_vpi =
8547 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
8548 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
8549 phba->sli4_hba.max_cfg_param.vpi_base =
8551 phba->sli4_hba.max_cfg_param.max_rpi =
8553 phba->sli4_hba.max_cfg_param.rpi_base =
8555 phba->sli4_hba.max_cfg_param.max_vfi =
8557 phba->sli4_hba.max_cfg_param.vfi_base =
8559 phba->sli4_hba.max_cfg_param.max_fcfi =
8561 phba->sli4_hba.max_cfg_param.max_eq =
8563 phba->sli4_hba.max_cfg_param.max_rq =
8565 phba->sli4_hba.max_cfg_param.max_wq =
8567 phba->sli4_hba.max_cfg_param.max_cq =
8570 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
8571 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
8572 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
8573 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
8574 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
8584 phba->sli4_hba.extents_in_use,
8585 phba->sli4_hba.max_cfg_param.xri_base,
8586 phba->sli4_hba.max_cfg_param.max_xri,
8587 phba->sli4_hba.max_cfg_param.vpi_base,
8588 phba->sli4_hba.max_cfg_param.max_vpi,
8589 phba->sli4_hba.max_cfg_param.vfi_base,
8590 phba->sli4_hba.max_cfg_param.max_vfi,
8591 phba->sli4_hba.max_cfg_param.rpi_base,
8592 phba->sli4_hba.max_cfg_param.max_rpi,
8593 phba->sli4_hba.max_cfg_param.max_fcfi,
8594 phba->sli4_hba.max_cfg_param.max_eq,
8595 phba->sli4_hba.max_cfg_param.max_cq,
8596 phba->sli4_hba.max_cfg_param.max_wq,
8597 phba->sli4_hba.max_cfg_param.max_rq,
8604 qmin = phba->sli4_hba.max_cfg_param.max_wq;
8605 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
8606 qmin = phba->sli4_hba.max_cfg_param.max_cq;
8607 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
8608 qmin = phba->sli4_hba.max_cfg_param.max_eq;
8625 phba->sli4_hba.max_cfg_param.max_wq,
8626 phba->sli4_hba.max_cfg_param.max_cq,
8627 phba->sli4_hba.max_cfg_param.max_eq,
8642 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8699 length = phba->sli4_hba.max_cfg_param.max_xri -
8708 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
8748 phba->sli4_hba.iov.pf_number =
8750 phba->sli4_hba.iov.vf_number =
8759 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
8760 phba->sli4_hba.iov.vf_number);
8793 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
8865 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8866 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8869 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8870 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
8886 phba->sli4_hba.cq_esize,
8891 phba->sli4_hba.cq_esize,
8892 phba->sli4_hba.cq_ecount, cpu);
8902 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
8908 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
8914 phba->sli4_hba.wq_esize,
8915 phba->sli4_hba.wq_ecount, cpu);
8925 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
8926 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
8958 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
8959 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
8960 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
8961 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
8962 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
8963 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
8964 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
8965 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
8966 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
8967 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
8969 if (!phba->sli4_hba.hdwq) {
8970 phba->sli4_hba.hdwq = kcalloc(
8973 if (!phba->sli4_hba.hdwq) {
8981 qp = &phba->sli4_hba.hdwq[idx];
9001 phba->sli4_hba.nvmet_cqset = kcalloc(
9005 if (!phba->sli4_hba.nvmet_cqset) {
9011 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
9015 if (!phba->sli4_hba.nvmet_mrq_hdr) {
9021 phba->sli4_hba.nvmet_mrq_data = kcalloc(
9025 if (!phba->sli4_hba.nvmet_mrq_data) {
9034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
9042 cpup = &phba->sli4_hba.cpu_map[cpu];
9047 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
9051 phba->sli4_hba.eq_esize,
9052 phba->sli4_hba.eq_ecount, cpu);
9067 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
9075 cpup = &phba->sli4_hba.cpu_map[cpu];
9082 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
9088 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
9089 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
9104 phba->sli4_hba.cq_esize,
9105 phba->sli4_hba.cq_ecount,
9116 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
9127 phba->sli4_hba.cq_esize,
9128 phba->sli4_hba.cq_ecount, cpu);
9135 phba->sli4_hba.mbx_cq = qdesc;
9139 phba->sli4_hba.cq_esize,
9140 phba->sli4_hba.cq_ecount, cpu);
9148 phba->sli4_hba.els_cq = qdesc;
9158 phba->sli4_hba.mq_esize,
9159 phba->sli4_hba.mq_ecount, cpu);
9166 phba->sli4_hba.mbx_wq = qdesc;
9174 phba->sli4_hba.wq_esize,
9175 phba->sli4_hba.wq_ecount, cpu);
9182 phba->sli4_hba.els_wq = qdesc;
9183 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
9188 phba->sli4_hba.cq_esize,
9189 phba->sli4_hba.cq_ecount, cpu);
9197 phba->sli4_hba.nvmels_cq = qdesc;
9201 phba->sli4_hba.wq_esize,
9202 phba->sli4_hba.wq_ecount, cpu);
9209 phba->sli4_hba.nvmels_wq = qdesc;
9210 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
9219 phba->sli4_hba.rq_esize,
9220 phba->sli4_hba.rq_ecount, cpu);
9226 phba->sli4_hba.hdr_rq = qdesc;
9230 phba->sli4_hba.rq_esize,
9231 phba->sli4_hba.rq_ecount, cpu);
9237 phba->sli4_hba.dat_rq = qdesc;
9247 phba->sli4_hba.rq_esize,
9257 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
9276 phba->sli4_hba.rq_esize,
9286 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
9293 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
9294 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
9301 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
9302 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
9344 hdwq = phba->sli4_hba.hdwq;
9361 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
9363 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
9399 if (phba->sli4_hba.hdwq)
9403 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
9406 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
9408 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
9413 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
9416 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
9419 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
9422 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
9423 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
9426 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
9429 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
9432 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
9435 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
9526 phba->sli4_hba.mbx_wq->queue_id,
9527 phba->sli4_hba.mbx_cq->queue_id);
9546 memset(phba->sli4_hba.cq_lookup, 0,
9547 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
9551 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
9556 if (childq->queue_id > phba->sli4_hba.cq_max)
9559 phba->sli4_hba.cq_lookup[childq->queue_id] =
9619 phba->sli4_hba.fw_func_mode =
9621 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
9622 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
9623 phba->sli4_hba.physical_port =
9627 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
9628 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
9635 qp = phba->sli4_hba.hdwq;
9649 cpup = &phba->sli4_hba.cpu_map[cpu];
9671 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
9684 cpup = &phba->sli4_hba.cpu_map[cpu];
9688 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
9691 &phba->sli4_hba.hdwq[qidx].io_cq_map,
9709 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
9712 phba->sli4_hba.mbx_cq ?
9719 phba->sli4_hba.mbx_cq,
9720 phba->sli4_hba.mbx_wq,
9729 if (!phba->sli4_hba.nvmet_cqset) {
9738 phba->sli4_hba.nvmet_cqset,
9750 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
9759 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
9764 phba->sli4_hba.nvmet_cqset[0]->queue_id,
9770 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
9773 phba->sli4_hba.els_cq ? "WQ" : "CQ");
9778 phba->sli4_hba.els_cq,
9779 phba->sli4_hba.els_wq,
9789 phba->sli4_hba.els_wq->queue_id,
9790 phba->sli4_hba.els_cq->queue_id);
9794 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
9797 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
9802 phba->sli4_hba.nvmels_cq,
9803 phba->sli4_hba.nvmels_wq,
9815 phba->sli4_hba.nvmels_wq->queue_id,
9816 phba->sli4_hba.nvmels_cq->queue_id);
9823 if ((!phba->sli4_hba.nvmet_cqset) ||
9824 (!phba->sli4_hba.nvmet_mrq_hdr) ||
9825 (!phba->sli4_hba.nvmet_mrq_data)) {
9834 phba->sli4_hba.nvmet_mrq_hdr,
9835 phba->sli4_hba.nvmet_mrq_data,
9836 phba->sli4_hba.nvmet_cqset,
9848 phba->sli4_hba.nvmet_mrq_hdr[0],
9849 phba->sli4_hba.nvmet_mrq_data[0],
9850 phba->sli4_hba.nvmet_cqset[0],
9864 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
9865 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
9866 phba->sli4_hba.nvmet_cqset[0]->queue_id);
9871 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
9878 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
9879 phba->sli4_hba.els_cq, LPFC_USOL);
9890 phba->sli4_hba.hdr_rq->queue_id,
9891 phba->sli4_hba.dat_rq->queue_id,
9892 phba->sli4_hba.els_cq->queue_id);
9904 if (phba->sli4_hba.cq_max) {
9905 kfree(phba->sli4_hba.cq_lookup);
9906 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
9908 if (!phba->sli4_hba.cq_lookup) {
9911 "size 0x%x\n", phba->sli4_hba.cq_max);
9945 if (phba->sli4_hba.mbx_wq)
9946 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
9949 if (phba->sli4_hba.nvmels_wq)
9950 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
9953 if (phba->sli4_hba.els_wq)
9954 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
9957 if (phba->sli4_hba.hdr_rq)
9958 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
9959 phba->sli4_hba.dat_rq);
9962 if (phba->sli4_hba.mbx_cq)
9963 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
9966 if (phba->sli4_hba.els_cq)
9967 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
9970 if (phba->sli4_hba.nvmels_cq)
9971 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
9975 if (phba->sli4_hba.nvmet_mrq_hdr) {
9979 phba->sli4_hba.nvmet_mrq_hdr[qidx],
9980 phba->sli4_hba.nvmet_mrq_data[qidx]);
9984 if (phba->sli4_hba.nvmet_cqset) {
9987 phba, phba->sli4_hba.nvmet_cqset[qidx]);
9992 if (phba->sli4_hba.hdwq) {
9996 qp = &phba->sli4_hba.hdwq[qidx];
10003 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
10008 kfree(phba->sli4_hba.cq_lookup);
10009 phba->sli4_hba.cq_lookup = NULL;
10010 phba->sli4_hba.cq_max = 0;
10035 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
10040 &phba->sli4_hba.sp_cqe_event_pool);
10065 &phba->sli4_hba.sp_cqe_event_pool, list) {
10086 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
10125 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
10163 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
10164 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
10166 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
10169 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
10170 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
10172 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
10205 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10247 if (lpfc_readl(phba->sli4_hba.u.if_type2.
10259 phba->sli4_hba.u.if_type2.ERR1regaddr);
10261 phba->sli4_hba.u.if_type2.ERR2regaddr);
10281 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
10347 &phba->sli4_hba.sli_intf.word0)) {
10352 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
10357 phba->sli4_hba.sli_intf.word0);
10361 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10376 phba->sli4_hba.conf_regs_memmap_p =
10378 if (!phba->sli4_hba.conf_regs_memmap_p) {
10384 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
10395 phba->sli4_hba.conf_regs_memmap_p =
10397 if (!phba->sli4_hba.conf_regs_memmap_p) {
10415 phba->sli4_hba.ctrl_regs_memmap_p =
10418 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
10426 phba->sli4_hba.ctrl_regs_memmap_p;
10442 phba->sli4_hba.drbl_regs_memmap_p =
10444 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10450 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
10463 phba->sli4_hba.drbl_regs_memmap_p =
10466 if (!phba->sli4_hba.drbl_regs_memmap_p) {
10474 phba->sli4_hba.drbl_regs_memmap_p;
10492 phba->sli4_hba.dpp_regs_memmap_p =
10494 if (!phba->sli4_hba.dpp_regs_memmap_p) {
10500 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
10507 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
10508 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
10509 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
10512 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
10513 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
10514 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
10523 if (phba->sli4_hba.drbl_regs_memmap_p)
10524 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10526 if (phba->sli4_hba.ctrl_regs_memmap_p)
10527 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10529 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10545 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10549 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10550 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
10551 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10554 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10557 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
10558 iounmap(phba->sli4_hba.conf_regs_memmap_p);
10559 if (phba->sli4_hba.dpp_regs_memmap_p)
10560 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
10815 cpup = &phba->sli4_hba.cpu_map[cpu];
10849 cpup = &phba->sli4_hba.cpu_map[idx];
10873 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
10898 cpup = &phba->sli4_hba.cpu_map[cpu];
10904 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
10937 * and the phba->sli4_hba.cpu_map array will reflect this.
10961 cpup = &phba->sli4_hba.cpu_map[cpu];
10998 cpup = &phba->sli4_hba.cpu_map[cpu];
11011 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
11012 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
11049 cpup = &phba->sli4_hba.cpu_map[cpu];
11062 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
11063 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
11103 cpup = &phba->sli4_hba.cpu_map[cpu];
11130 cpup = &phba->sli4_hba.cpu_map[cpu];
11152 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
11153 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
11168 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
11169 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
11203 cpup = &phba->sli4_hba.cpu_map[cpu];
11205 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
11273 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
11390 orig_mask = &phba->sli4_hba.irq_aff_mask;
11395 cpup = &phba->sli4_hba.cpu_map[cpu];
11529 aff_mask = &phba->sli4_hba.irq_aff_mask;
11597 cpup = &phba->sli4_hba.cpu_map[cpu];
11866 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
11880 qp = &phba->sli4_hba.hdwq[idx];
11890 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
11919 qp = &phba->sli4_hba.hdwq[idx];
11930 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
11933 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
11957 phba->sli4_hba.intr_enable = 0;
12054 phba->sli4_hba.rpi_hdrs_in_use = 1;
12062 if (!phba->sli4_hba.intr_enable)
12070 sli4_params = &phba->sli4_hba.pc_sli4_params;
12101 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
12102 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
12153 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) !=
12195 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
12197 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
12829 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
13034 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
13937 if (phba->sli4_hba.pc_sli4_params.oas_supported) {