Lines Matching refs:sli4_hba
327 phba->sli4_hba.nvmet_xri_cnt,
328 phba->sli4_hba.nvmet_io_wait_cnt,
329 phba->sli4_hba.nvmet_io_wait_total,
349 phba->sli4_hba.max_cfg_param.max_xri,
350 phba->sli4_hba.io_xri_max,
472 cstat = &phba->sli4_hba.hdwq[i].nvme_cstat;
552 cstat = &phba->sli4_hba.hdwq[i].scsi_cstat;
810 if_type = phba->sli4_hba.pc_sli4_params.if_type;
811 sli_family = phba->sli4_hba.pc_sli4_params.sli_family;
961 &phba->sli4_hba.sli_intf) ==
965 if (bf_get(lpfc_conf_trunk_port0, &phba->sli4_hba))
972 if (bf_get(lpfc_conf_trunk_port1, &phba->sli4_hba))
979 if (bf_get(lpfc_conf_trunk_port2, &phba->sli4_hba))
986 if (bf_get(lpfc_conf_trunk_port3, &phba->sli4_hba))
1017 if (phba->sli4_hba.lnk_info.lnk_dv == LPFC_LNK_DAT_VAL) {
1018 if (phba->sli4_hba.lnk_info.lnk_tp == LPFC_LNK_TYPE_GE)
1020 if (phba->sli4_hba.lnk_info.lnk_tp == LPFC_LNK_TYPE_FC)
1044 phba->sli4_hba.pc_sli4_params.oas_supported);
1261 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1478 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
1490 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
1534 (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
1561 reg_val = readl(phba->sli4_hba.conf_regs_memmap_p +
1571 writel(reg_val, phba->sli4_hba.conf_regs_memmap_p +
1574 readl(phba->sli4_hba.conf_regs_memmap_p + LPFC_CTL_PDEV_CTL_OFFSET);
1903 phba->sli4_hba.max_cfg_param.rpi_used;
1908 phba->sli4_hba.max_cfg_param.xri_used;
1922 *avpi = max_vpi - phba->sli4_hba.max_cfg_param.vpi_used;
2993 memcpy(phba->sli4_hba.oas_next_tgt_wwpn, wwpn, (8 * sizeof(uint8_t)));
2999 phba->sli4_hba.oas_next_lun = FIND_FIRST_OAS_LUN;
3124 memcpy(phba->sli4_hba.oas_next_vpt_wwpn, wwpn, (8 * sizeof(uint8_t)));
3132 phba->sli4_hba.oas_next_lun = FIND_FIRST_OAS_LUN;
3289 phba->sli4_hba.oas_next_vpt_wwpn,
3291 phba->sli4_hba.oas_next_tgt_wwpn,
3292 &phba->sli4_hba.oas_next_lun,
3500 phba->sli4_hba.pc_sli4_params.pls);
4081 (!phba->sli4_hba.pc_sli4_params.pls &&
4505 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
5055 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
5168 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
5272 phba->sli4_hba.num_possible_cpu);
5276 while (phba->sli4_hba.curr_disp_cpu <
5277 phba->sli4_hba.num_possible_cpu) {
5278 cpup = &phba->sli4_hba.cpu_map[phba->sli4_hba.curr_disp_cpu];
5280 if (!cpu_present(phba->sli4_hba.curr_disp_cpu))
5283 phba->sli4_hba.curr_disp_cpu);
5290 phba->sli4_hba.curr_disp_cpu,
5299 phba->sli4_hba.curr_disp_cpu,
5310 phba->sli4_hba.curr_disp_cpu,
5321 phba->sli4_hba.curr_disp_cpu,
5329 phba->sli4_hba.curr_disp_cpu++;
5332 if (phba->sli4_hba.curr_disp_cpu <
5333 phba->sli4_hba.num_possible_cpu &&
5341 if (phba->sli4_hba.curr_disp_cpu == phba->sli4_hba.num_possible_cpu)
5342 phba->sli4_hba.curr_disp_cpu = 0;
5734 struct cpumask *aff_mask = &phba->sli4_hba.irq_aff_mask;
5839 aff_mask = &phba->sli4_hba.irq_aff_mask;
7419 phba->cfg_hdw_queue = phba->sli4_hba.num_present_cpu;
7421 phba->cfg_irq_chann = phba->sli4_hba.num_present_cpu;
7453 if (phba->cfg_hdw_queue > phba->sli4_hba.num_present_cpu) {
7454 phba->cfg_hdw_queue = phba->sli4_hba.num_present_cpu;
7457 if (phba->cfg_irq_chann > phba->sli4_hba.num_present_cpu) {
7458 phba->cfg_irq_chann = phba->sli4_hba.num_present_cpu;