Lines Matching refs:set_interrupt_mask_reg
100 .set_interrupt_mask_reg = 0x0022C,
125 .set_interrupt_mask_reg = 0x00288,
150 .set_interrupt_mask_reg = 0x00010,
752 writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
754 writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
5677 writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
8406 writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
8416 writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
9905 t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;