Lines Matching refs:TRM_S1040_DMA_CONTROL
1180 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
1194 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1694 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
1884 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1887 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1931 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
2086 /*DC395x_write8 (TRM_S1040_DMA_CONTROL, STOPDMAXFER); */
2294 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
3506 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
3507 /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
4330 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);