Lines Matching defs:phase
406 data_out_phase0,/* phase:0 */
407 data_in_phase0, /* phase:1 */
408 command_phase0, /* phase:2 */
409 status_phase0, /* phase:3 */
410 nop0, /* phase:4 PH_BUS_FREE .. initial phase */
411 nop0, /* phase:5 PH_BUS_FREE .. initial phase */
412 msgout_phase0, /* phase:6 */
413 msgin_phase0, /* phase:7 */
417 data_out_phase1,/* phase:0 */
418 data_in_phase1, /* phase:1 */
419 command_phase1, /* phase:2 */
420 status_phase1, /* phase:3 */
421 nop1, /* phase:4 PH_BUS_FREE .. initial phase */
422 nop1, /* phase:5 PH_BUS_FREE .. initial phase */
423 msgout_phase1, /* phase:6 */
424 msgin_phase1, /* phase:7 */
899 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1078 printk(" state=0x%04x status=0x%02x phase=0x%02x (%sconn.)\n",
1128 "clear_fifo: (%i bytes) on phase %02x in %s\n",
1413 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1525 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1568 u16 phase;
1621 phase = (u16)srb->scsi_phase;
1625 * call dc395x_scsi_phase0[]... "phase entry"
1626 * handle every phase before start transfer
1628 /* data_out_phase0, phase:0 */
1629 /* data_in_phase0, phase:1 */
1630 /* command_phase0, phase:2 */
1631 /* status_phase0, phase:3 */
1632 /* nop0, phase:4 PH_BUS_FREE .. initial phase */
1633 /* nop0, phase:5 PH_BUS_FREE .. initial phase */
1634 /* msgout_phase0, phase:6 */
1635 /* msgin_phase0, phase:7 */
1636 dc395x_statev = dc395x_scsi_phase0[phase];
1641 * will be modify to bus free phase new scsi_status
1645 phase = (u16)scsi_status & PHASEMASK;
1648 * call dc395x_scsi_phase1[]... "phase entry" handle
1649 * every phase to do transfer
1651 /* data_out_phase1, phase:0 */
1652 /* data_in_phase1, phase:1 */
1653 /* command_phase1, phase:2 */
1654 /* status_phase1, phase:3 */
1655 /* nop1, phase:4 PH_BUS_FREE .. initial phase */
1656 /* nop1, phase:5 PH_BUS_FREE .. initial phase */
1657 /* msgout_phase1, phase:6 */
1658 /* msgin_phase1, phase:7 */
1659 dc395x_statev = dc395x_scsi_phase1[phase];
1711 *pscsi_status = PH_BUS_FREE; /*.. initial phase */
1874 * Best might be to call it in DataXXPhase0, if new phase will differ
1915 * However, the device might have been the one to stop us (phase
1992 * But: Why the interrupt: No phase change. No XFERCNT_2_ZERO. Or?
2041 /* do prepare before transfer when data out phase */
2055 * and switches to another phase, the SCSI engine should be finished too.
2079 * sent data to the FIFO in a MsgIn phase, eg.?
2239 } else { /* phase changed */
2451 *pscsi_status = PH_BUS_FREE; /*.. initial phase */
2910 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
3071 srb->scsi_phase = PH_BUS_FREE; /* initial phase */