Lines Matching defs:ulp_num
562 uint8_t ulp_num = 0;
567 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
574 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
575 icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
576 icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
589 iscsi_icd_start[ulp_num] =
603 phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
612 iscsi_icd_start[ulp_num],
614 iscsi_icd_count[ulp_num],
620 total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
1708 u8 header, u8 ulp_num, u16 nbuf)
1719 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1723 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1724 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1729 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1730 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1771 u8 ulp_num, consumed, header = 0;
1776 ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
1777 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1790 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
2349 uint8_t mem_descr_index, ulp_num;
2374 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2375 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2379 phba, ulp_num) *
2384 phba, ulp_num) *
2389 phba, ulp_num) *
2394 phba, ulp_num) *
2398 (ulp_num * MEM_DESCR_OFFSET));
2400 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2404 (ulp_num * MEM_DESCR_OFFSET));
2410 (ulp_num * MEM_DESCR_OFFSET));
2416 (ulp_num * MEM_DESCR_OFFSET));
2422 (ulp_num * MEM_DESCR_OFFSET));
2428 (ulp_num * MEM_DESCR_OFFSET));
2430 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2434 (ulp_num * MEM_DESCR_OFFSET));
2436 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2440 (ulp_num * MEM_DESCR_OFFSET));
2443 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2703 uint8_t ulp_num;
2711 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2712 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2716 (ulp_num * MEM_DESCR_OFFSET));
2719 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2723 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2732 ulp_num);
2736 (ulp_num * MEM_DESCR_OFFSET);
2741 ulp_num,
2748 ulp_num);
2762 (ulp_num * MEM_DESCR_OFFSET);
2767 ulp_num,
2774 ulp_num);
2782 (ulp_num * MEM_DESCR_OFFSET);
2787 ulp_num,
2794 ulp_num);
2802 (ulp_num * MEM_DESCR_OFFSET);
2807 ulp_num,
2814 ulp_num);
2822 (ulp_num * MEM_DESCR_OFFSET);
2827 ulp_num);
2842 (ulp_num * MEM_DESCR_OFFSET);
2847 ulp_num,
2854 ulp_num);
2870 (phba, ulp_num); index++) {
3130 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3140 dq = &phwi_context->be_def_hdrq[ulp_num];
3145 (ulp_num * MEM_DESCR_OFFSET);
3153 ulp_num);
3162 BEISCSI_DEFQ_HDR, ulp_num);
3166 ulp_num);
3173 ulp_num,
3174 phwi_context->be_def_hdrq[ulp_num].id);
3182 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3192 dataq = &phwi_context->be_def_dataq[ulp_num];
3197 (ulp_num * MEM_DESCR_OFFSET);
3206 ulp_num);
3215 BEISCSI_DEFQ_DATA, ulp_num);
3220 ulp_num);
3226 ulp_num,
3227 phwi_context->be_def_dataq[ulp_num].id);
3231 "on ULP : %d\n", ulp_num);
3242 int status, ulp_num;
3244 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3245 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3248 (ulp_num * MEM_DESCR_OFFSET);
3258 "ULP_%d\n", ulp_num);
3264 "ULP_%d\n", ulp_num);
3277 int status, ulp_num = 0;
3283 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3284 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3288 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3340 unsigned int idx, num, i, ulp_num;
3395 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3396 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3398 ulp_base_num = ulp_num;
3399 cid_count_ulp[ulp_num] =
3400 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3625 int i, eq_for_mcc, ulp_num;
3627 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3628 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3629 beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3651 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3652 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3654 q = &phwi_context->be_def_hdrq[ulp_num];
3658 q = &phwi_context->be_def_dataq[ulp_num];
3698 int status, ulp_num;
3731 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3732 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3733 nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
3739 ulp_num);
3743 ulp_num);
3750 ulp_num);
3754 ulp_num);
3762 ulp_num, nbufs);
3764 ulp_num, nbufs);
3788 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3791 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3796 phwi_ctrlr, ulp_num);
3799 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3887 unsigned int ulp_icd_start, ulp_num = 0;
3954 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3955 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3958 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
3992 uint16_t i, ulp_num;
3995 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3996 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4004 ulp_num);
4012 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4019 ulp_num);
4027 phba, ulp_num);
4030 phba->cid_array_info[ulp_num] = ptr_cid_info;
4061 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4063 ptr_cid_info = phba->cid_array_info[ulp_num];
4069 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4070 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4071 ptr_cid_info = phba->cid_array_info[ulp_num];
4080 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4081 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4082 ptr_cid_info = phba->cid_array_info[ulp_num];
4087 phba->cid_array_info[ulp_num] = NULL;
4187 int ulp_num;
4194 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4195 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4196 ptr_cid_info = phba->cid_array_info[ulp_num];
4201 phba->cid_array_info[ulp_num] = NULL;