Lines Matching refs:atpdev
1254 struct atp_unit *atpdev = shost_priv(shpnt);
1255 struct pci_dev *pdev = atpdev->pdev;
1269 atpdev->ioport[0] = shpnt->io_port;
1270 atpdev->pciport[0] = shpnt->io_port + 0x20;
1272 atpdev->host_id[0] = host_id;
1273 scam_on = atp_readb_pci(atpdev, 0, 2);
1274 atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1275 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1277 if (atpdev->ultra_map[0] == 0) {
1279 atpdev->global_map[0] = 0x20;
1280 atpdev->ultra_map[0] = 0xffff;
1284 atp_writeb_base(atpdev, 0x3e, 0x00); /* enable terminator */
1286 k = (atp_readb_base(atpdev, 0x3a) & 0xf3) | 0x10;
1287 atp_writeb_base(atpdev, 0x3a, k);
1288 atp_writeb_base(atpdev, 0x3a, k & 0xdf);
1290 atp_writeb_base(atpdev, 0x3a, k);
1292 atp_set_host_id(atpdev, 0, host_id);
1295 atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) | 0x10);
1296 atp_is(atpdev, 0, wide_chip, 0);
1297 atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) & 0xef);
1298 atp_writeb_base(atpdev, 0x3b, atp_readb_base(atpdev, 0x3b) | 0x20);
1305 struct atp_unit *atpdev = shost_priv(shpnt);
1306 struct pci_dev *pdev = atpdev->pdev;
1312 atpdev->ioport[0] = shpnt->io_port + 0x40;
1313 atpdev->pciport[0] = shpnt->io_port + 0x28;
1315 host_id = atp_readb_base(atpdev, 0x39) >> 4;
1319 atpdev->host_id[0] = host_id;
1321 atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1322 atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1327 atp_writew_base(atpdev, 0x34, n);
1329 if (atp_readb_base(atpdev, 0x30) == 0xff)
1332 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1333 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1334 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1335 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1336 atp_writew_base(atpdev, 0x34, n);
1338 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1339 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1340 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1341 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1342 atp_writew_base(atpdev, 0x34, n);
1344 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1345 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1346 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1347 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1348 atp_writew_base(atpdev, 0x34, n);
1350 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1351 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1352 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1353 atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1356 atp_writew_base(atpdev, 0x34, 0);
1357 atpdev->ultra_map[0] = 0;
1358 atpdev->async[0] = 0;
1361 if (atpdev->sp[0][k] > 1)
1362 atpdev->ultra_map[0] |= n;
1364 if (atpdev->sp[0][k] == 0)
1365 atpdev->async[0] |= n;
1367 atpdev->async[0] = ~(atpdev->async[0]);
1368 atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1370 k = atp_readb_base(atpdev, 0x38) & 0x80;
1371 atp_writeb_base(atpdev, 0x38, k);
1372 atp_writeb_base(atpdev, 0x3b, 0x20);
1374 atp_writeb_base(atpdev, 0x3b, 0);
1376 atp_readb_io(atpdev, 0, 0x1b);
1377 atp_readb_io(atpdev, 0, 0x17);
1379 atp_set_host_id(atpdev, 0, host_id);
1381 tscam(shpnt, true, atp_readb_base(atpdev, 0x22));
1382 atp_is(atpdev, 0, true, atp_readb_base(atpdev, 0x3f) & 0x40);
1383 atp_writeb_base(atpdev, 0x38, 0xb0);
1390 struct atp_unit *atpdev = shost_priv(shpnt);
1391 struct pci_dev *pdev = atpdev->pdev;
1399 atpdev->ioport[0] = shpnt->io_port + 0x80;
1400 atpdev->ioport[1] = shpnt->io_port + 0xc0;
1401 atpdev->pciport[0] = shpnt->io_port + 0x40;
1402 atpdev->pciport[1] = shpnt->io_port + 0x50;
1404 c = atp_readb_base(atpdev, 0x29);
1405 atp_writeb_base(atpdev, 0x29, c | 0x04);
1409 atp_writew_base(atpdev, 0x3c, n);
1410 if (atp_readl_base(atpdev, 0x38) == 0xffffffff)
1413 atpdev->global_map[m] = 0;
1415 atp_writew_base(atpdev, 0x3c, n++);
1416 ((u32 *)&setupdata[m][0])[k] = atp_readl_base(atpdev, 0x38);
1419 atp_writew_base(atpdev, 0x3c, n++);
1420 ((u32 *)&atpdev->sp[m][0])[k] = atp_readl_base(atpdev, 0x38);
1425 c = atp_readb_base(atpdev, 0x29);
1426 atp_writeb_base(atpdev, 0x29, c & 0xfb);
1428 atpdev->ultra_map[c] = 0;
1429 atpdev->async[c] = 0;
1432 if (atpdev->sp[c][k] > 1)
1433 atpdev->ultra_map[c] |= n;
1435 if (atpdev->sp[c][k] == 0)
1436 atpdev->async[c] |= n;
1438 atpdev->async[c] = ~(atpdev->async[c]);
1440 if (atpdev->global_map[c] == 0) {
1443 atpdev->global_map[c] |= 0x20;
1445 atpdev->global_map[c] |= k;
1447 atpdev->global_map[c] |= 0x08;
1448 atpdev->host_id[c] = setupdata[c][0] & 0x07;
1452 k = atp_readb_base(atpdev, 0x28) & 0x8f;
1454 atp_writeb_base(atpdev, 0x28, k);
1455 atp_writeb_pci(atpdev, 0, 1, 0x80);
1456 atp_writeb_pci(atpdev, 1, 1, 0x80);
1458 atp_writeb_pci(atpdev, 0, 1, 0);
1459 atp_writeb_pci(atpdev, 1, 1, 0);
1461 atp_readb_io(atpdev, 0, 0x1b);
1462 atp_readb_io(atpdev, 0, 0x17);
1463 atp_readb_io(atpdev, 1, 0x1b);
1464 atp_readb_io(atpdev, 1, 0x17);
1466 k = atpdev->host_id[0];
1469 atp_set_host_id(atpdev, 0, k);
1471 k = atpdev->host_id[1];
1474 atp_set_host_id(atpdev, 1, k);
1478 atp_is(atpdev, 0, true, atp_readb_io(atpdev, 0, 0x1b) >> 7);
1479 atp_writeb_io(atpdev, 0, 0x16, 0x80);
1481 atp_is(atpdev, 1, true, atp_readb_io(atpdev, 1, 0x1b) >> 7);
1482 atp_writeb_io(atpdev, 1, 0x16, 0x80);
1483 k = atp_readb_base(atpdev, 0x28) & 0xcf;
1485 atp_writeb_base(atpdev, 0x28, k);
1486 k = atp_readb_base(atpdev, 0x1f) | 0x80;
1487 atp_writeb_base(atpdev, 0x1f, k);
1488 k = atp_readb_base(atpdev, 0x29) | 0x01;
1489 atp_writeb_base(atpdev, 0x29, k);
1491 shpnt->max_lun = (atpdev->global_map[0] & 0x07) + 1;
1493 shpnt->this_id = atpdev->host_id[0];
1500 struct atp_unit *atpdev;
1528 atpdev = shost_priv(shpnt);
1530 atpdev->host = shpnt;
1531 atpdev->pdev = pdev;
1532 pci_set_drvdata(pdev, atpdev);
1537 atpdev->baseport = shpnt->io_port;
1547 if (is880(atpdev))
1549 else if (is885(atpdev))