Lines Matching refs:intmask_org

124 	u32 intmask_org);
1745 						u32 intmask_org)
1752 		mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1756 		acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1762 		mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1767 		acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1773 		writel(intmask_org & mask, &reg->host_int_mask);
1774 		acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1781 		writel(intmask_org | mask, reg->pcief0_int_enable);
1789 		writel(intmask_org & mask, &reg->host_int_mask);
2884 			uint32_t intmask_org;
2886 			intmask_org = arcmsr_disable_outbound_ints(acb);
2889 			arcmsr_enable_outbound_ints(acb, intmask_org);
3353 	uint32_t intmask_org;
3357 	intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3358 	writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3399 	uint32_t intmask_org;
3402 	intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3403 	writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3425 	uint32_t intmask_org;
3428 	intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3429 	writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
4524 	uint32_t intmask_org;
4526 	intmask_org = arcmsr_disable_outbound_ints(acb);
4535 	arcmsr_enable_outbound_ints(acb, intmask_org);
4542 	uint32_t intmask_org;
4549 		intmask_org = arcmsr_disable_outbound_ints(acb);
4567 		arcmsr_enable_outbound_ints(acb, intmask_org);
4641 	uint32_t intmask_org;
4661 	intmask_org = arcmsr_disable_outbound_ints(acb);
4671 	arcmsr_enable_outbound_ints(acb, intmask_org);