Lines Matching refs:uchar
63 typedef unsigned char uchar;
122 #define ASC_SCSI_TIX_TYPE uchar
124 #define ASC_SCSI_BIT_ID_TYPE uchar
256 uchar status;
257 uchar q_no;
258 uchar cntl;
259 uchar sg_queue_cnt;
260 uchar target_id;
261 uchar target_lun;
265 uchar sense_len;
266 uchar extra_bytes;
271 uchar target_ix;
272 uchar flag;
273 uchar cdb_len;
274 uchar tag_code;
279 uchar done_stat;
280 uchar host_stat;
281 uchar scsi_stat;
282 uchar scsi_msg;
286 uchar cdb[ASC_MAX_CDB_LEN];
287 uchar y_first_sg_list_qp;
288 uchar y_working_sg_qp;
289 uchar y_working_sg_ix;
290 uchar y_res;
300 uchar q_status;
301 uchar q_no;
302 uchar cntl;
303 uchar sense_len;
304 uchar extra_bytes;
305 uchar res;
325 uchar *cdbptr;
334 uchar *cdbptr;
336 uchar *sense_ptr;
338 uchar cdb[ASC_MAX_CDB_LEN];
339 uchar sense[ASC_MIN_SENSE_LEN];
343 uchar fwd;
344 uchar bwd;
352 uchar seq_no;
353 uchar q_no;
354 uchar cntl;
355 uchar sg_head_qp;
356 uchar sg_list_cnt;
357 uchar sg_cur_list_cnt;
361 uchar fwd;
362 uchar bwd;
432 uchar msg_type;
433 uchar msg_len;
434 uchar msg_req;
437 uchar sdtr_xfer_period;
438 uchar sdtr_req_ack_offset;
441 uchar wdtr_width;
444 uchar mdp_b3;
445 uchar mdp_b2;
446 uchar mdp_b1;
447 uchar mdp_b0;
450 uchar res;
466 uchar chip_scsi_id;
467 uchar isa_dma_speed;
468 uchar isa_dma_channel;
469 uchar chip_version;
472 uchar max_tag_qng[ASC_MAX_TID + 1];
473 uchar sdtr_period_offset[ASC_MAX_TID + 1];
474 uchar adapter_info[6];
510 uchar *overrun_buf;
512 uchar scsi_reset_wait;
513 uchar chip_no;
515 uchar max_total_qng;
516 uchar cur_total_qng;
517 uchar in_critical_cnt;
518 uchar last_q_shortage;
520 uchar cur_dvc_qng[ASC_MAX_TID + 1];
521 uchar max_dvc_qng[ASC_MAX_TID + 1];
524 const uchar *sdtr_period_tbl;
529 uchar dos_int13_table[ASC_MAX_TID + 1];
533 uchar min_sdtr_index;
534 uchar max_sdtr_index;
540 uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
591 uchar init_sdtr;
592 uchar disc_enable;
593 uchar use_cmd_qng;
594 uchar start_motor;
595 uchar max_total_qng;
596 uchar max_tag_qng;
597 uchar bios_scan;
598 uchar power_up_wait;
599 uchar no_scam;
600 uchar id_speed; /* low order 4 bits is chip scsi id */
602 uchar dos_int13_table[ASC_MAX_TID + 1];
603 uchar adapter_info[6];
706 #define SC_SEL (uchar)(0x80)
707 #define SC_BSY (uchar)(0x40)
708 #define SC_ACK (uchar)(0x20)
709 #define SC_REQ (uchar)(0x10)
710 #define SC_ATN (uchar)(0x08)
711 #define SC_IO (uchar)(0x04)
712 #define SC_CD (uchar)(0x02)
713 #define SC_MSG (uchar)(0x01)
714 #define SEC_SCSI_CTL (uchar)(0x80)
715 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
716 #define SEC_SLEW_RATE (uchar)(0x20)
717 #define SEC_ENABLE_FILTER (uchar)(0x10)
777 #define CC_CHIP_RESET (uchar)0x80
778 #define CC_SCSI_RESET (uchar)0x40
779 #define CC_HALT (uchar)0x20
780 #define CC_SINGLE_STEP (uchar)0x10
781 #define CC_DMA_ABLE (uchar)0x08
782 #define CC_TEST (uchar)0x04
783 #define CC_BANK_ONE (uchar)0x02
784 #define CC_DIAG (uchar)0x01
817 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
819 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
824 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
832 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
836 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
838 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
844 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
848 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
852 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
858 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
868 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
944 uchar adapter_scsi_id; /* 09 Host Adapter ID */
945 uchar bios_boot_delay; /* power up wait */
947 uchar scsi_reset_delay; /* 10 reset delay */
948 uchar bios_id_lun; /* first boot device scsi id & lun */
952 uchar termination; /* 11 0 - automatic */
958 uchar reserved1; /* reserved byte (not used) */
979 uchar max_host_qng; /* 15 maximum host queuing */
980 uchar max_dvc_qng; /* maximum per device queuing */
987 uchar oem_name[16]; /* 22 OEM name */
1013 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1014 uchar bios_boot_delay; /* power up wait */
1016 uchar scsi_reset_delay; /* 10 reset delay */
1017 uchar bios_id_lun; /* first boot device scsi id & lun */
1021 uchar termination_se; /* 11 0 - automatic */
1027 uchar termination_lvd; /* 11 0 - automatic */
1052 uchar max_host_qng; /* 15 maximum host queueing */
1053 uchar max_dvc_qng; /* maximum per device queuing */
1060 uchar oem_name[16]; /* 22 OEM name */
1115 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1116 uchar bios_boot_delay; /* power up wait */
1118 uchar scsi_reset_delay; /* 10 reset delay */
1119 uchar bios_id_lun; /* first boot device scsi id & lun */
1123 uchar termination_se; /* 11 0 - automatic */
1129 uchar termination_lvd; /* 11 0 - automatic */
1154 uchar max_host_qng; /* 15 maximum host queueing */
1155 uchar max_dvc_qng; /* maximum per device queuing */
1162 uchar oem_name[16]; /* 22 OEM name */
1711 uchar chip_version; /* chip version */
1712 uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
1725 uchar reserved1;
1726 uchar reserved2;
1727 uchar reserved3;
1728 uchar sg_cnt; /* Valid entries in block. */
1748 uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */
1749 uchar target_cmd;
1750 uchar target_id; /* Device target identifier. */
1751 uchar target_lun; /* Device target logical unit number. */
1756 uchar mflag;
1757 uchar sense_len;
1758 uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */
1759 uchar scsi_cntl;
1760 uchar done_status; /* Completion status. */
1761 uchar scsi_status; /* SCSI status byte. */
1762 uchar host_status; /* Ucode host status. */
1763 uchar sg_working_ix;
1764 uchar cdb[12]; /* SCSI CDB bytes 0-11. */
1767 uchar cdb16[4]; /* SCSI CDB bytes 12-15. */
1801 uchar align[24]; /* Request structure padding. */
1832 uchar max_dvc_qng; /* maximum number of tagged commands per device */
1834 uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */
1835 uchar chip_no; /* should be assigned by caller */
1836 uchar max_host_qng; /* maximum number of Q'ed command allowed */
1839 uchar chip_scsi_id; /* chip SCSI target ID */
1840 uchar chip_type;
1841 uchar bist_err_code;
2204 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
2207 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
2210 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
2277 uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */
2442 static void asc_prt_hex(char *f, uchar *s, int l)
2796 static int asc_get_eeprom_string(ushort *serialnum, uchar *cp)
2885 uchar serialstr[13];
2956 uchar serialstr[13];
3297 uchar syn_period_ix;
3352 uchar lrambyte;
3656 static void AscSetBank(PortAddr iop_base, uchar bank)
3658 uchar val;
3692 uchar cc_val;
3697 AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT));
3745 if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) {
3773 static uchar AscReadLramByte(PortAddr iop_base, ushort addr)
3816 static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val)
3841 const uchar *s_buffer, int words)
3868 ushort s_addr, uchar *s_buffer, int dwords)
3887 ushort s_addr, uchar *d_buffer, int words)
3913 uchar i;
3924 (uchar)(i + 1));
3926 (uchar)(asc_dvc->max_total_qng));
3928 (uchar)i);
3933 (uchar)(i + 1));
3935 (uchar)(i - 1));
3937 (uchar)i);
3940 (uchar)ASC_QLINK_END);
3942 (uchar)(asc_dvc->max_total_qng - 1));
3944 (uchar)asc_dvc->max_total_qng);
3947 for (; i <= (uchar)(asc_dvc->max_total_qng + 3);
3960 const uchar *mcode_buf, ushort mcode_size)
3997 (uchar)((int)asc_dvc->max_total_qng + 1));
3999 (uchar)((int)asc_dvc->max_total_qng + 2));
4046 (uchar *)&phy_addr, 1);
4049 (uchar *)&phy_size, 1);
4413 uchar tid;
4416 uchar max_cmd[ADV_MAX_TID + 1];
4856 uchar byte;
4857 uchar tid;
4860 uchar max_cmd[ADV_MAX_TID + 1];
5342 uchar byte;
5343 uchar tid;
5346 uchar max_cmd[ASC_MAX_TID + 1];
5824 uchar tid, max_cmd[ADV_MAX_TID + 1];
5907 static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code)
6113 uchar int_stat;
6136 uchar intrb_code;
6236 uchar host_flag;
6237 uchar risc_flag;
6251 (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT));
6263 static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time)
6265 const uchar *period_table;
6276 return (uchar)i;
6279 return (uchar)max_index;
6281 return (uchar)(max_index + 1);
6285 static uchar
6286 AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset)
6289 uchar sdtr_period_index = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
6301 (uchar *)&sdtr_buf,
6307 (uchar *)&sdtr_buf,
6313 static uchar
6314 AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset)
6316 uchar byte;
6317 uchar sdtr_period_ix;
6326 static bool AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data)
6355 static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no)
6371 uchar tag_code;
6372 uchar q_status;
6373 uchar halt_qp;
6374 uchar sdtr_data;
6375 uchar target_ix;
6376 uchar q_cntl, tid_no;
6377 uchar cur_dvc_qng;
6378 uchar asyn_sdtr;
6379 uchar scsi_status;
6396 target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no);
6419 (uchar *)&ext_msg,
6509 (uchar *)&ext_msg,
6523 (uchar *)&ext_msg,
6546 (uchar)(asc_dvc->
6549 (uchar)(sdtr_data & (uchar)
6593 (uchar *)&out_msg,
6662 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
6671 DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
6688 static uchar
6694 uchar sg_queue_cnt;
6698 (uchar *)scsiq,
6703 scsiq->q_status = (uchar)_val;
6704 scsiq->q_no = (uchar)(_val >> 8);
6707 scsiq->cntl = (uchar)_val;
6708 sg_queue_cnt = (uchar)(_val >> 8);
6712 scsiq->sense_len = (uchar)_val;
6713 scsiq->extra_bytes = (uchar)(_val >> 8);
6852 uchar next_qp;
6853 uchar n_q_used;
6854 uchar sg_list_qp;
6855 uchar sg_queue_cnt;
6856 uchar q_cnt;
6857 uchar done_q_tail;
6858 uchar tid_no;
6864 uchar cur_target_qng;
6872 done_q_tail = (uchar)AscGetVarDoneQTail(iop_base);
6884 (uchar)(scsiq->
6885 q_status & (uchar)~(QS_READY |
6973 (uchar)(CC_SCSI_RESET
7015 uchar ctrl_reg;
7016 uchar saved_ctrl_reg;
7019 uchar host_flag;
7048 saved_ctrl_reg &= (uchar)(~CC_HALT);
7063 (uchar)(~ASC_HOST_FLAG_IN_ISR);
7065 (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR));
7071 saved_ctrl_reg &= (uchar)(~CC_HALT);
7254 uchar saved_stop_code;
7273 AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data)
7865 AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs)
7870 uchar tid_no;
7902 static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head)
7905 uchar next_qp;
7906 uchar q_status;
7909 q_status = (uchar)AscReadLramByte(iop_base,
7918 static uchar
7919 AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q)
7921 uchar i;
7933 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7942 DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7957 static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
7960 uchar tid_no;
7961 uchar sdtr_data;
7962 uchar syn_period_ix;
7963 uchar syn_offset;
7986 (uchar *)scsiq->cdbptr, scsiq->q2.cdb_len >> 1);
7990 (uchar *)&scsiq->q1.cntl,
8000 AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
8013 uchar next_qp;
8038 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
8073 (uchar *)&scsi_sg_q,
8077 (uchar *)&sg_head->
8093 AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required)
8096 uchar free_q_head;
8097 uchar next_qp;
8098 uchar tid_no;
8099 uchar target_ix;
8106 free_q_head = (uchar)AscGetVarFreeQHead(iop_base);
8109 (uchar)n_q_required);
8133 static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = {
8162 uchar target_ix;
8163 uchar tid_no;
8164 uchar sdtr_data;
8165 uchar extra_bytes;
8166 uchar scsi_cmd;
8167 uchar disable_cmd;
8190 (uchar)(asc_dvc->
8193 (uchar)(sdtr_data & (uchar)
8273 (uchar)((ushort)addr & 0x0003);
8320 (uchar)((ushort)addr & 0x0003);
8622 static uchar AscSetChipScsiID(PortAddr iop_base, uchar new_host_id)
8661 static void AscEnableIsaDma(uchar dma_channel)
8716 uchar value;
8731 static uchar AscGetIsaDmaSpeed(PortAddr iop_base)
8733 uchar speed_value;
8742 static uchar AscSetIsaDmaSpeed(PortAddr iop_base, uchar speed_value)
8756 uchar chip_version;
8824 (uchar)AscGetIsaDmaChannel(iop_base);
8836 static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg)
8856 static ushort AscReadEEPWord(PortAddr iop_base, uchar addr)
8859 uchar cmd_reg;
8886 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
8897 wval = AscReadEEPWord(iop_base, (uchar)s_addr);
8914 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
8964 static ushort AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val)
8975 (uchar)((uchar)ASC_EEP_CMD_WRITE | addr));
9002 if (*wbuf != AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
9021 AscWriteEEPWord(iop_base, (uchar)s_addr, word)) {
9027 AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
9035 if (sum != AscWriteEEPWord(iop_base, (uchar)s_addr, sum)) {
9045 if (*wbuf != AscReadEEPWord(iop_base, (uchar)s_addr)) {
9064 (iop_base, (uchar)s_addr));
9067 word = AscReadEEPWord(iop_base, (uchar)s_addr);
9074 if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) {
9246 (uchar)(ASC_DEF_SDTR_OFFSET |
10296 uchar tid, termination;
10495 uchar tid, termination;