Lines Matching refs:sdtr_able
938 ushort sdtr_able; /* 04 Synchronous DTR able */
1824 ushort sdtr_able; /* try SDTR for a device */
2369 printk(" sdtr_able 0x%x, wdtr_able 0x%x\n",
2370 (unsigned)h->sdtr_able, (unsigned)h->wdtr_able);
3094 (ep_3550->sdtr_able & ADV_TID_TO_TIDMASK(i)) ?
3354 ushort sdtr_able, wdtr_able;
3455 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
3465 (sdtr_able & ADV_TID_TO_TIDMASK(i)) ? 'Y' : 'N');
3479 ((sdtr_able & ADV_TID_TO_TIDMASK(i)) == 0)) {
4415 ushort wdtr_able = 0, sdtr_able, tagqng_able;
4463 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
4562 asc_dvc->sdtr_able);
4814 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
4859 ushort wdtr_able, sdtr_able, tagqng_able;
4894 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5079 asc_dvc->sdtr_able);
5300 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5345 ushort wdtr_able, sdtr_able, ppr_able, tagqng_able;
5381 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5574 asc_dvc->sdtr_able);
5793 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5822 ushort wdtr_able, sdtr_able, tagqng_able;
5834 AdvReadWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
5891 AdvWriteWordLram(iop_base, ASC_MC_SDTR_ABLE, sdtr_able);
7395 * 'sdtr_able' bit. Write the new value to the microcode.
7448 if ((adv_dvc->sdtr_able & tidmask) && sdev->sdtr)
9438 0xFFFF, /* sdtr_able */
9476 0, /* sdtr_able */
10187 asc_dvc->sdtr_able = eep_config.sdtr_able;
10359 * are set, then set an 'sdtr_able' bit for it.
10361 asc_dvc->sdtr_able = 0;
10373 asc_dvc->sdtr_able |= (1 << tid);
10583 * are set, then set an 'sdtr_able' bit for it.
10585 asc_dvc->sdtr_able = 0;
10597 asc_dvc->sdtr_able |= (1 << tid);
11089 ep_3550->sdtr_able = adv_dvc_varp->sdtr_able;