Lines Matching refs:info
62 static inline u32 tegra_rtc_check_busy(struct tegra_rtc_info *info)
64 return readl(info->base + TEGRA_RTC_REG_BUSY) & 1;
80 struct tegra_rtc_info *info = dev_get_drvdata(dev);
87 while (tegra_rtc_check_busy(info)) {
104 struct tegra_rtc_info *info = dev_get_drvdata(dev);
112 spin_lock_irqsave(&info->lock, flags);
114 readl(info->base + TEGRA_RTC_REG_MILLI_SECONDS);
115 sec = readl(info->base + TEGRA_RTC_REG_SHADOW_SECONDS);
117 spin_unlock_irqrestore(&info->lock, flags);
128 struct tegra_rtc_info *info = dev_get_drvdata(dev);
140 writel(sec, info->base + TEGRA_RTC_REG_SECONDS);
143 readl(info->base + TEGRA_RTC_REG_SECONDS));
150 struct tegra_rtc_info *info = dev_get_drvdata(dev);
153 sec = readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
164 value = readl(info->base + TEGRA_RTC_REG_INTR_STATUS);
172 struct tegra_rtc_info *info = dev_get_drvdata(dev);
177 spin_lock_irqsave(&info->lock, flags);
180 status = readl(info->base + TEGRA_RTC_REG_INTR_MASK);
186 writel(status, info->base + TEGRA_RTC_REG_INTR_MASK);
188 spin_unlock_irqrestore(&info->lock, flags);
195 struct tegra_rtc_info *info = dev_get_drvdata(dev);
204 writel(sec, info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
206 readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0));
234 struct tegra_rtc_info *info = dev_get_drvdata(dev);
238 status = readl(info->base + TEGRA_RTC_REG_INTR_STATUS);
243 spin_lock_irqsave(&info->lock, flags);
244 writel(0, info->base + TEGRA_RTC_REG_INTR_MASK);
245 writel(status, info->base + TEGRA_RTC_REG_INTR_STATUS);
246 spin_unlock_irqrestore(&info->lock, flags);
257 rtc_update_irq(info->rtc, 1, events);
279 struct tegra_rtc_info *info;
282 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
283 if (!info)
286 info->base = devm_platform_ioremap_resource(pdev, 0);
287 if (IS_ERR(info->base))
288 return PTR_ERR(info->base);
294 info->irq = ret;
296 info->rtc = devm_rtc_allocate_device(&pdev->dev);
297 if (IS_ERR(info->rtc))
298 return PTR_ERR(info->rtc);
300 info->rtc->ops = &tegra_rtc_ops;
301 info->rtc->range_max = U32_MAX;
303 info->clk = devm_clk_get(&pdev->dev, NULL);
304 if (IS_ERR(info->clk))
305 return PTR_ERR(info->clk);
307 ret = clk_prepare_enable(info->clk);
311 /* set context info */
312 info->pdev = pdev;
313 spin_lock_init(&info->lock);
315 platform_set_drvdata(pdev, info);
318 writel(0, info->base + TEGRA_RTC_REG_SECONDS_ALARM0);
319 writel(0xffffffff, info->base + TEGRA_RTC_REG_INTR_STATUS);
320 writel(0, info->base + TEGRA_RTC_REG_INTR_MASK);
324 ret = devm_request_irq(&pdev->dev, info->irq, tegra_rtc_irq_handler,
332 ret = rtc_register_device(info->rtc);
341 clk_disable_unprepare(info->clk);
347 struct tegra_rtc_info *info = platform_get_drvdata(pdev);
349 clk_disable_unprepare(info->clk);
357 struct tegra_rtc_info *info = dev_get_drvdata(dev);
362 writel(0xffffffff, info->base + TEGRA_RTC_REG_INTR_STATUS);
364 info->base + TEGRA_RTC_REG_INTR_MASK);
367 readl(info->base + TEGRA_RTC_REG_SECONDS_ALARM0));
370 device_may_wakeup(dev), info->irq);
374 enable_irq_wake(info->irq);
381 struct tegra_rtc_info *info = dev_get_drvdata(dev);
388 disable_irq_wake(info->irq);