Lines Matching refs:isr
98 u16 isr;
151 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
153 if (!(isr & STM32_RTC_ISR_INITF)) {
154 isr |= STM32_RTC_ISR_INIT;
155 writel_relaxed(isr, rtc->base + regs->isr);
164 rtc->base + regs->isr,
165 isr, (isr & STM32_RTC_ISR_INITF),
175 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
177 isr &= ~STM32_RTC_ISR_INIT;
178 writel_relaxed(isr, rtc->base + regs->isr);
184 unsigned int isr = readl_relaxed(rtc->base + regs->isr);
186 isr &= ~STM32_RTC_ISR_RSF;
187 writel_relaxed(isr, rtc->base + regs->isr);
193 return readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
194 isr,
195 (isr & STM32_RTC_ISR_RSF),
471 unsigned int cr, isr, alrmar;
509 ret = readl_relaxed_poll_timeout_atomic(rtc->base + regs->isr,
510 isr,
511 (isr & STM32_RTC_ISR_ALRAWF),
543 writel_relaxed(readl_relaxed(rtc->base + regs->isr) & ~flags,
544 rtc->base + regs->isr);
555 .isr = 0x0C,
577 .isr = 0x0C,
608 .isr = 0x0C, /* named RTC_ICSR on stm32mp1 */
821 if (!(readl_relaxed(rtc->base + regs->isr) & STM32_RTC_ISR_INITS))