Lines Matching refs:data
52 static u64 rtc_read_lpsrt(struct snvs_rtc_data *data)
56 regmap_read(data->regmap, data->offset + SNVS_LPSRTCMR, &msb);
57 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &lsb);
64 static u32 rtc_read_lp_counter(struct snvs_rtc_data *data)
74 read1 = rtc_read_lpsrt(data);
77 read1 = rtc_read_lpsrt(data);
81 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n");
88 static int rtc_read_lp_counter_lsb(struct snvs_rtc_data *data, u32 *lsb)
94 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1);
97 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1);
101 dev_err(&data->rtc->dev, "Timeout trying to get valid LPSRT Counter read\n");
109 static int rtc_write_sync_lp(struct snvs_rtc_data *data)
116 ret = rtc_read_lp_counter_lsb(data, &count1);
122 ret = rtc_read_lp_counter_lsb(data, &count2);
128 dev_err(&data->rtc->dev, "Timeout waiting for LPSRT Counter to change\n");
134 static int snvs_rtc_enable(struct snvs_rtc_data *data, bool enable)
139 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_SRTC_ENV,
143 regmap_read(data->regmap, data->offset + SNVS_LPCR, &lpcr);
162 struct snvs_rtc_data *data = dev_get_drvdata(dev);
166 if (data->clk) {
167 ret = clk_enable(data->clk);
172 time = rtc_read_lp_counter(data);
175 if (data->clk)
176 clk_disable(data->clk);
183 struct snvs_rtc_data *data = dev_get_drvdata(dev);
187 if (data->clk) {
188 ret = clk_enable(data->clk);
194 ret = snvs_rtc_enable(data, false);
199 regmap_write(data->regmap, data->offset + SNVS_LPSRTCLR, time << CNTR_TO_SECS_SH);
200 regmap_write(data->regmap, data->offset + SNVS_LPSRTCMR, time >> (32 - CNTR_TO_SECS_SH));
203 ret = snvs_rtc_enable(data, true);
205 if (data->clk)
206 clk_disable(data->clk);
213 struct snvs_rtc_data *data = dev_get_drvdata(dev);
217 if (data->clk) {
218 ret = clk_enable(data->clk);
223 regmap_read(data->regmap, data->offset + SNVS_LPTAR, &lptar);
226 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr);
229 if (data->clk)
230 clk_disable(data->clk);
237 struct snvs_rtc_data *data = dev_get_drvdata(dev);
240 if (data->clk) {
241 ret = clk_enable(data->clk);
246 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR,
250 ret = rtc_write_sync_lp(data);
252 if (data->clk)
253 clk_disable(data->clk);
260 struct snvs_rtc_data *data = dev_get_drvdata(dev);
264 if (data->clk) {
265 ret = clk_enable(data->clk);
270 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_LPTA_EN, 0);
271 ret = rtc_write_sync_lp(data);
274 regmap_write(data->regmap, data->offset + SNVS_LPTAR, time);
277 regmap_write(data->regmap, data->offset + SNVS_LPSR, SNVS_LPSR_LPTA);
279 if (data->clk)
280 clk_disable(data->clk);
296 struct snvs_rtc_data *data = dev_get_drvdata(dev);
300 if (data->clk)
301 clk_enable(data->clk);
303 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr);
311 rtc_update_irq(data->rtc, 1, events);
315 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr);
317 if (data->clk)
318 clk_disable(data->clk);
329 static void snvs_rtc_action(void *data)
331 if (data)
332 clk_disable_unprepare(data);
337 struct snvs_rtc_data *data;
341 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
342 if (!data)
345 data->rtc = devm_rtc_allocate_device(&pdev->dev);
346 if (IS_ERR(data->rtc))
347 return PTR_ERR(data->rtc);
349 data->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "regmap");
351 if (IS_ERR(data->regmap)) {
358 data->regmap = devm_regmap_init_mmio(&pdev->dev, mmio, &snvs_rtc_config);
360 data->offset = SNVS_LPREGISTER_OFFSET;
361 of_property_read_u32(pdev->dev.of_node, "offset", &data->offset);
364 if (IS_ERR(data->regmap)) {
369 data->irq = platform_get_irq(pdev, 0);
370 if (data->irq < 0)
371 return data->irq;
373 data->clk = devm_clk_get(&pdev->dev, "snvs-rtc");
374 if (IS_ERR(data->clk)) {
375 data->clk = NULL;
377 ret = clk_prepare_enable(data->clk);
385 ret = devm_add_action_or_reset(&pdev->dev, snvs_rtc_action, data->clk);
389 platform_set_drvdata(pdev, data);
392 regmap_write(data->regmap, data->offset + SNVS_LPPGDR, SNVS_LPPGDR_INIT);
395 regmap_write(data->regmap, data->offset + SNVS_LPSR, 0xffffffff);
398 ret = snvs_rtc_enable(data, true);
405 ret = dev_pm_set_wake_irq(&pdev->dev, data->irq);
409 ret = devm_request_irq(&pdev->dev, data->irq, snvs_rtc_irq_handler,
413 data->irq, ret);
417 data->rtc->ops = &snvs_rtc_ops;
418 data->rtc->range_max = U32_MAX;
420 return rtc_register_device(data->rtc);
425 struct snvs_rtc_data *data = dev_get_drvdata(dev);
427 if (data->clk)
428 clk_disable(data->clk);
435 struct snvs_rtc_data *data = dev_get_drvdata(dev);
437 if (data->clk)
438 return clk_enable(data->clk);