Lines Matching refs:info
48 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
49 struct rtc_device *rtc = info->rtc;
53 spin_lock(&info->lock);
55 rtsr = readl_relaxed(info->rtsr);
57 writel_relaxed(0, info->rtsr);
64 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr);
73 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
79 writel_relaxed(rtsr & (RTSR_ALE | RTSR_HZE), info->rtsr);
89 spin_unlock(&info->lock);
97 struct sa1100_rtc *info = dev_get_drvdata(dev);
99 spin_lock_irq(&info->lock);
100 rtsr = readl_relaxed(info->rtsr);
105 writel_relaxed(rtsr, info->rtsr);
106 spin_unlock_irq(&info->lock);
112 struct sa1100_rtc *info = dev_get_drvdata(dev);
114 rtc_time64_to_tm(readl_relaxed(info->rcnr), tm);
120 struct sa1100_rtc *info = dev_get_drvdata(dev);
122 writel_relaxed(rtc_tm_to_time64(tm), info->rcnr);
130 struct sa1100_rtc *info = dev_get_drvdata(dev);
132 rtsr = readl_relaxed(info->rtsr);
140 struct sa1100_rtc *info = dev_get_drvdata(dev);
142 spin_lock_irq(&info->lock);
143 writel_relaxed(readl_relaxed(info->rtsr) &
144 (RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr);
145 writel_relaxed(rtc_tm_to_time64(&alrm->time), info->rtar);
147 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
149 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
150 spin_unlock_irq(&info->lock);
157 struct sa1100_rtc *info = dev_get_drvdata(dev);
159 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
160 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
174 int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info)
178 spin_lock_init(&info->lock);
180 info->clk = devm_clk_get(&pdev->dev, NULL);
181 if (IS_ERR(info->clk)) {
183 return PTR_ERR(info->clk);
186 ret = clk_prepare_enable(info->clk);
196 if (readl_relaxed(info->rttr) == 0) {
197 writel_relaxed(RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16), info->rttr);
201 writel_relaxed(0, info->rcnr);
204 info->rtc->ops = &sa1100_rtc_ops;
205 info->rtc->max_user_freq = RTC_FREQ;
206 info->rtc->range_max = U32_MAX;
208 ret = rtc_register_device(info->rtc);
210 clk_disable_unprepare(info->clk);
236 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
244 struct sa1100_rtc *info;
254 info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
255 if (!info)
257 info->irq_1hz = irq_1hz;
258 info->irq_alarm = irq_alarm;
260 info->rtc = devm_rtc_allocate_device(&pdev->dev);
261 if (IS_ERR(info->rtc))
262 return PTR_ERR(info->rtc);
283 info->rcnr = base + 0x04;
284 info->rtsr = base + 0x10;
285 info->rtar = base + 0x00;
286 info->rttr = base + 0x08;
288 info->rcnr = base + 0x0;
289 info->rtsr = base + 0x8;
290 info->rtar = base + 0x4;
291 info->rttr = base + 0xc;
294 platform_set_drvdata(pdev, info);
297 return sa1100_rtc_init(pdev, info);
302 struct sa1100_rtc *info = platform_get_drvdata(pdev);
304 if (info) {
305 spin_lock_irq(&info->lock);
306 writel_relaxed(0, info->rtsr);
307 spin_unlock_irq(&info->lock);
308 clk_disable_unprepare(info->clk);
317 struct sa1100_rtc *info = dev_get_drvdata(dev);
319 enable_irq_wake(info->irq_alarm);
325 struct sa1100_rtc *info = dev_get_drvdata(dev);
327 disable_irq_wake(info->irq_alarm);