Lines Matching defs:rtsr
50 unsigned int rtsr;
55 rtsr = readl_relaxed(info->rtsr);
57 writel_relaxed(0, info->rtsr);
60 if (rtsr & (RTSR_ALE | RTSR_HZE)) {
64 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr);
73 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
77 if (rtsr & RTSR_AL)
78 rtsr &= ~RTSR_ALE;
79 writel_relaxed(rtsr & (RTSR_ALE | RTSR_HZE), info->rtsr);
82 if (rtsr & RTSR_AL)
84 if (rtsr & RTSR_HZ)
96 u32 rtsr;
100 rtsr = readl_relaxed(info->rtsr);
102 rtsr |= RTSR_ALE;
104 rtsr &= ~RTSR_ALE;
105 writel_relaxed(rtsr, info->rtsr);
129 u32 rtsr;
132 rtsr = readl_relaxed(info->rtsr);
133 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
134 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
143 writel_relaxed(readl_relaxed(info->rtsr) &
144 (RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr);
147 writel_relaxed(readl_relaxed(info->rtsr) | RTSR_ALE, info->rtsr);
149 writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
160 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
236 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr);
284 info->rtsr = base + 0x10;
289 info->rtsr = base + 0x8;
306 writel_relaxed(0, info->rtsr);