Lines Matching refs:DSR
14 * Note that reading the DSR (DryIce Status Register) automatically clears
54 #define DSR 0x14 /* Status Reg */
102 * @dsr: copy of the DSR register
245 dev_dbg(&imxdi->pdev->dev, "DSR register reports: %08X\n", dsr);
274 di_write_busy_wait(imxdi, DSR_CAF, DSR);
314 * - its overflow flag is set (TCO in DSR)
316 * - NVF is set in DSR
324 di_write_busy_wait(imxdi, DSR_NVF, DSR);
326 di_write_busy_wait(imxdi, DSR_TCO, DSR);
333 return di_handle_valid_state(imxdi, __raw_readl(imxdi->ioaddr + DSR));
376 DSR_MCO | DSR_TCO), DSR);
378 dsr = readl(imxdi->ioaddr + DSR);
382 "There are still some sources of pain in DSR: %08x!\n",
390 di_write_busy_wait(imxdi, DSR_SVF, DSR);
393 dsr = readl(imxdi->ioaddr + DSR);
414 dsr = readl(imxdi->ioaddr + DSR);
478 writel(DSR_WEF, imxdi->ioaddr + DSR);
482 if ((readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
561 dsr = readl(imxdi->ioaddr + DSR);
616 /* don't allow the DSR read to mess up DSR_WCF */
620 alarm->pending = (readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
666 dsr = readl(imxdi->ioaddr + DSR);
694 /* DSR_WCF clears itself on DSR read */
709 /* DSR_WCF clears itself on DSR read */
732 di_write_wait(imxdi, DSR_CAF, DSR);