Lines Matching refs:rtap
56 struct coh901331_port *rtap = data;
58 clk_enable(rtap->clk);
60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
68 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
69 clk_disable(rtap->clk);
72 rtc_update_irq(rtap->rtc, 1, RTC_AF);
79 struct coh901331_port *rtap = dev_get_drvdata(dev);
81 clk_enable(rtap->clk);
83 if (!readl(rtap->virtbase + COH901331_VALID)) {
84 clk_disable(rtap->clk);
88 rtc_time64_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm);
89 clk_disable(rtap->clk);
95 struct coh901331_port *rtap = dev_get_drvdata(dev);
97 clk_enable(rtap->clk);
98 writel(rtc_tm_to_time64(tm), rtap->virtbase + COH901331_SET_TIME);
99 clk_disable(rtap->clk);
106 struct coh901331_port *rtap = dev_get_drvdata(dev);
108 clk_enable(rtap->clk);
109 rtc_time64_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time);
110 alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U;
111 alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U;
112 clk_disable(rtap->clk);
119 struct coh901331_port *rtap = dev_get_drvdata(dev);
122 clk_enable(rtap->clk);
123 writel(time, rtap->virtbase + COH901331_ALARM);
124 writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK);
125 clk_disable(rtap->clk);
132 struct coh901331_port *rtap = dev_get_drvdata(dev);
134 clk_enable(rtap->clk);
136 writel(1, rtap->virtbase + COH901331_IRQ_MASK);
138 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
139 clk_disable(rtap->clk);
154 struct coh901331_port *rtap = platform_get_drvdata(pdev);
156 if (rtap)
157 clk_unprepare(rtap->clk);
166 struct coh901331_port *rtap;
168 rtap = devm_kzalloc(&pdev->dev,
170 if (!rtap)
173 rtap->virtbase = devm_platform_ioremap_resource(pdev, 0);
174 if (IS_ERR(rtap->virtbase))
175 return PTR_ERR(rtap->virtbase);
177 rtap->irq = platform_get_irq(pdev, 0);
178 if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0,
179 "RTC COH 901 331 Alarm", rtap))
182 rtap->clk = devm_clk_get(&pdev->dev, NULL);
183 if (IS_ERR(rtap->clk)) {
184 ret = PTR_ERR(rtap->clk);
189 rtap->rtc = devm_rtc_allocate_device(&pdev->dev);
190 if (IS_ERR(rtap->rtc))
191 return PTR_ERR(rtap->rtc);
193 rtap->rtc->ops = &coh901331_ops;
194 rtap->rtc->range_max = U32_MAX;
197 ret = clk_prepare_enable(rtap->clk);
202 clk_disable(rtap->clk);
204 platform_set_drvdata(pdev, rtap);
206 ret = rtc_register_device(rtap->rtc);
213 clk_unprepare(rtap->clk);
220 struct coh901331_port *rtap = dev_get_drvdata(dev);
228 enable_irq_wake(rtap->irq);
230 clk_enable(rtap->clk);
231 rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK);
232 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
233 clk_disable(rtap->clk);
235 clk_unprepare(rtap->clk);
242 struct coh901331_port *rtap = dev_get_drvdata(dev);
244 ret = clk_prepare(rtap->clk);
249 disable_irq_wake(rtap->irq);
251 clk_enable(rtap->clk);
252 writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK);
253 clk_disable(rtap->clk);
263 struct coh901331_port *rtap = platform_get_drvdata(pdev);
265 clk_enable(rtap->clk);
266 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
267 clk_disable_unprepare(rtap->clk);