Lines Matching refs:adsp
101 static int qcom_adsp_shutdown(struct qcom_adsp *adsp)
108 val = readl(adsp->qdsp6ss_base + RET_CFG_REG);
110 writel(val, adsp->qdsp6ss_base + RET_CFG_REG);
112 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
115 ret = regmap_read(adsp->halt_map,
116 adsp->halt_lpass + LPASS_PWR_ON_REG, &val);
120 ret = regmap_read(adsp->halt_map,
121 adsp->halt_lpass + LPASS_MASTER_IDLE_REG,
126 regmap_write(adsp->halt_map,
127 adsp->halt_lpass + LPASS_HALTREQ_REG, 1);
132 ret = regmap_read(adsp->halt_map,
133 adsp->halt_lpass + LPASS_HALTACK_REG, &val);
140 ret = regmap_read(adsp->halt_map,
141 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, &val);
143 dev_err(adsp->dev, "port failed halt\n");
147 reset_control_assert(adsp->pdc_sync_reset);
149 reset_control_assert(adsp->restart);
154 regmap_write(adsp->halt_map, adsp->halt_lpass + LPASS_HALTREQ_REG, 0);
157 reset_control_deassert(adsp->pdc_sync_reset);
159 reset_control_deassert(adsp->restart);
168 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
171 ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, 0,
172 adsp->mem_region, adsp->mem_phys,
173 adsp->mem_size, &adsp->mem_reloc);
177 qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
184 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
188 qcom_q6v5_prepare(&adsp->q6v5);
190 ret = clk_prepare_enable(adsp->xo);
194 dev_pm_genpd_set_performance_state(adsp->dev, INT_MAX);
195 ret = pm_runtime_get_sync(adsp->dev);
197 pm_runtime_put_noidle(adsp->dev);
201 ret = clk_bulk_prepare_enable(adsp->num_clks, adsp->clks);
203 dev_err(adsp->dev, "adsp clk_enable failed\n");
208 writel(1, adsp->qdsp6ss_base + QDSP6SS_XO_CBCR);
211 writel(1, adsp->qdsp6ss_base + QDSP6SS_SLEEP_CBCR);
214 writel(1, adsp->qdsp6ss_base + QDSP6SS_CORE_CBCR);
217 writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG);
220 writel(0x1, adsp->qdsp6ss_base + CORE_START_REG);
223 writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG);
226 ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG,
229 dev_err(adsp->dev, "failed to bootup adsp\n");
233 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5 * HZ));
235 dev_err(adsp->dev, "start timed out\n");
242 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks);
244 dev_pm_genpd_set_performance_state(adsp->dev, 0);
245 pm_runtime_put(adsp->dev);
247 clk_disable_unprepare(adsp->xo);
249 qcom_q6v5_unprepare(&adsp->q6v5);
256 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
258 clk_disable_unprepare(adsp->xo);
259 dev_pm_genpd_set_performance_state(adsp->dev, 0);
260 pm_runtime_put(adsp->dev);
265 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
269 ret = qcom_q6v5_request_stop(&adsp->q6v5);
271 dev_err(adsp->dev, "timed out on wait\n");
273 ret = qcom_adsp_shutdown(adsp);
275 dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
277 handover = qcom_q6v5_unprepare(&adsp->q6v5);
279 qcom_adsp_pil_handover(&adsp->q6v5);
286 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
289 offset = da - adsp->mem_reloc;
290 if (offset < 0 || offset + len > adsp->mem_size)
293 return adsp->mem_region + offset;
298 struct qcom_adsp *adsp = rproc->priv;
300 return qcom_q6v5_panic(&adsp->q6v5);
312 static int adsp_init_clock(struct qcom_adsp *adsp, const char **clk_ids)
317 adsp->xo = devm_clk_get(adsp->dev, "xo");
318 if (IS_ERR(adsp->xo)) {
319 ret = PTR_ERR(adsp->xo);
321 dev_err(adsp->dev, "failed to get xo clock");
328 adsp->num_clks = num_clks;
329 adsp->clks = devm_kcalloc(adsp->dev, adsp->num_clks,
330 sizeof(*adsp->clks), GFP_KERNEL);
331 if (!adsp->clks)
334 for (i = 0; i < adsp->num_clks; i++)
335 adsp->clks[i].id = clk_ids[i];
337 return devm_clk_bulk_get(adsp->dev, adsp->num_clks, adsp->clks);
340 static int adsp_init_reset(struct qcom_adsp *adsp)
342 adsp->pdc_sync_reset = devm_reset_control_get_optional_exclusive(adsp->dev,
344 if (IS_ERR(adsp->pdc_sync_reset)) {
345 dev_err(adsp->dev, "failed to acquire pdc_sync reset\n");
346 return PTR_ERR(adsp->pdc_sync_reset);
349 adsp->restart = devm_reset_control_get_optional_exclusive(adsp->dev, "restart");
352 if (!adsp->restart)
353 adsp->restart = devm_reset_control_get_exclusive(adsp->dev, "cc_lpass");
355 if (IS_ERR(adsp->restart)) {
356 dev_err(adsp->dev, "failed to acquire restart\n");
357 return PTR_ERR(adsp->restart);
363 static int adsp_init_mmio(struct qcom_adsp *adsp,
369 adsp->qdsp6ss_base = devm_platform_ioremap_resource(pdev, 0);
370 if (IS_ERR(adsp->qdsp6ss_base)) {
371 dev_err(adsp->dev, "failed to map QDSP6SS registers\n");
372 return PTR_ERR(adsp->qdsp6ss_base);
381 adsp->halt_map = syscon_node_to_regmap(syscon);
383 if (IS_ERR(adsp->halt_map))
384 return PTR_ERR(adsp->halt_map);
387 1, &adsp->halt_lpass);
396 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
402 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
404 dev_err(adsp->dev, "no memory-region specified\n");
413 adsp->mem_phys = adsp->mem_reloc = r.start;
414 adsp->mem_size = resource_size(&r);
415 adsp->mem_region = devm_ioremap_wc(adsp->dev,
416 adsp->mem_phys, adsp->mem_size);
417 if (!adsp->mem_region) {
418 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
419 &r.start, adsp->mem_size);
429 struct qcom_adsp *adsp;
438 desc->firmware_name, sizeof(*adsp));
445 adsp = (struct qcom_adsp *)rproc->priv;
446 adsp->dev = &pdev->dev;
447 adsp->rproc = rproc;
448 adsp->info_name = desc->sysmon_name;
449 platform_set_drvdata(pdev, adsp);
451 ret = adsp_alloc_memory_region(adsp);
455 ret = adsp_init_clock(adsp, desc->clk_ids);
459 pm_runtime_enable(adsp->dev);
461 ret = adsp_init_reset(adsp);
465 ret = adsp_init_mmio(adsp, pdev);
469 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem,
474 qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
475 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
476 adsp->sysmon = qcom_add_sysmon_subdev(rproc,
479 if (IS_ERR(adsp->sysmon)) {
480 ret = PTR_ERR(adsp->sysmon);
491 pm_runtime_disable(adsp->dev);
500 struct qcom_adsp *adsp = platform_get_drvdata(pdev);
502 rproc_del(adsp->rproc);
504 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
505 qcom_remove_sysmon_subdev(adsp->sysmon);
506 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
507 pm_runtime_disable(adsp->dev);
508 rproc_free(adsp->rproc);
515 .firmware_name = "adsp.mdt",
517 .sysmon_name = "adsp",
541 { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init },