Lines Matching refs:q6v5
22 * @q6v5: reference to qcom_q6v5 context to be reinitialized
26 int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5)
28 reinit_completion(&q6v5->start_done);
29 reinit_completion(&q6v5->stop_done);
31 q6v5->running = true;
32 q6v5->handover_issued = false;
34 enable_irq(q6v5->handover_irq);
42 * @q6v5: reference to qcom_q6v5 context to be unprepared
46 int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5)
48 disable_irq(q6v5->handover_irq);
50 return !q6v5->handover_issued;
56 struct qcom_q6v5 *q6v5 = data;
61 if (!q6v5->running) {
62 complete(&q6v5->stop_done);
66 msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, q6v5->crash_reason, &len);
68 dev_err(q6v5->dev, "watchdog received: %s\n", msg);
70 dev_err(q6v5->dev, "watchdog without message\n");
72 rproc_report_crash(q6v5->rproc, RPROC_WATCHDOG);
79 struct qcom_q6v5 *q6v5 = data;
83 msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, q6v5->crash_reason, &len);
85 dev_err(q6v5->dev, "fatal error received: %s\n", msg);
87 dev_err(q6v5->dev, "fatal error without message\n");
89 q6v5->running = false;
90 rproc_report_crash(q6v5->rproc, RPROC_FATAL_ERROR);
97 struct qcom_q6v5 *q6v5 = data;
99 complete(&q6v5->start_done);
106 * @q6v5: reference to qcom_q6v5 context
113 int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout)
117 ret = wait_for_completion_timeout(&q6v5->start_done, timeout);
119 disable_irq(q6v5->handover_irq);
127 struct qcom_q6v5 *q6v5 = data;
129 if (q6v5->handover)
130 q6v5->handover(q6v5);
132 q6v5->handover_issued = true;
139 struct qcom_q6v5 *q6v5 = data;
141 complete(&q6v5->stop_done);
148 * @q6v5: reference to qcom_q6v5 context
152 int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5)
156 q6v5->running = false;
158 qcom_smem_state_update_bits(q6v5->state,
159 BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
161 ret = wait_for_completion_timeout(&q6v5->stop_done, 5 * HZ);
163 qcom_smem_state_update_bits(q6v5->state, BIT(q6v5->stop_bit), 0);
171 * @q6v5: reference to qcom_q6v5 context
178 unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5)
180 qcom_smem_state_update_bits(q6v5->state,
181 BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
188 * qcom_q6v5_init() - initializer of the q6v5 common struct
189 * @q6v5: handle to be initialized
197 int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev,
199 void (*handover)(struct qcom_q6v5 *q6v5))
203 q6v5->rproc = rproc;
204 q6v5->dev = &pdev->dev;
205 q6v5->crash_reason = crash_reason;
206 q6v5->handover = handover;
208 init_completion(&q6v5->start_done);
209 init_completion(&q6v5->stop_done);
211 q6v5->wdog_irq = platform_get_irq_byname(pdev, "wdog");
212 if (q6v5->wdog_irq < 0)
213 return q6v5->wdog_irq;
215 ret = devm_request_threaded_irq(&pdev->dev, q6v5->wdog_irq,
218 "q6v5 wdog", q6v5);
224 q6v5->fatal_irq = platform_get_irq_byname(pdev, "fatal");
225 if (q6v5->fatal_irq < 0)
226 return q6v5->fatal_irq;
228 ret = devm_request_threaded_irq(&pdev->dev, q6v5->fatal_irq,
231 "q6v5 fatal", q6v5);
237 q6v5->ready_irq = platform_get_irq_byname(pdev, "ready");
238 if (q6v5->ready_irq < 0)
239 return q6v5->ready_irq;
241 ret = devm_request_threaded_irq(&pdev->dev, q6v5->ready_irq,
244 "q6v5 ready", q6v5);
250 q6v5->handover_irq = platform_get_irq_byname(pdev, "handover");
251 if (q6v5->handover_irq < 0)
252 return q6v5->handover_irq;
254 ret = devm_request_threaded_irq(&pdev->dev, q6v5->handover_irq,
257 "q6v5 handover", q6v5);
262 disable_irq(q6v5->handover_irq);
264 q6v5->stop_irq = platform_get_irq_byname(pdev, "stop-ack");
265 if (q6v5->stop_irq < 0)
266 return q6v5->stop_irq;
268 ret = devm_request_threaded_irq(&pdev->dev, q6v5->stop_irq,
271 "q6v5 stop", q6v5);
277 q6v5->state = qcom_smem_state_get(&pdev->dev, "stop", &q6v5->stop_bit);
278 if (IS_ERR(q6v5->state)) {
280 return PTR_ERR(q6v5->state);