Lines Matching refs:wm8350
3 // wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
16 #include <linux/mfd/wm8350/core.h>
17 #include <linux/mfd/wm8350/pmic.h>
96 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
101 switch (wm8350->pmic.isink_A_dcdc) {
104 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
106 wm8350_set_bits(wm8350, WM8350_CSA_FLASH_CONTROL,
108 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
109 1 << (wm8350->pmic.isink_A_dcdc -
117 switch (wm8350->pmic.isink_B_dcdc) {
120 wm8350_set_bits(wm8350, WM8350_POWER_MGMT_7,
122 wm8350_set_bits(wm8350, WM8350_CSB_FLASH_CONTROL,
124 wm8350_set_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
125 1 << (wm8350->pmic.isink_B_dcdc -
140 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
145 switch (wm8350->pmic.isink_A_dcdc) {
148 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
149 1 << (wm8350->pmic.isink_A_dcdc -
151 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
159 switch (wm8350->pmic.isink_B_dcdc) {
162 wm8350_clear_bits(wm8350, WM8350_DCDC_LDO_REQUESTED,
163 1 << (wm8350->pmic.isink_B_dcdc -
165 wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_7,
180 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
185 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_A) &
188 return wm8350_reg_read(wm8350, WM8350_CURRENT_SINK_DRIVER_B) &
196 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
202 reg = wm8350_reg_read(wm8350, WM8350_CSA_FLASH_CONTROL);
205 reg = wm8350_reg_read(wm8350, WM8350_CSB_FLASH_CONTROL);
239 int wm8350_isink_set_flash(struct wm8350 *wm8350, int isink, u16 mode,
245 wm8350_reg_write(wm8350, WM8350_CSA_FLASH_CONTROL,
251 wm8350_reg_write(wm8350, WM8350_CSB_FLASH_CONTROL,
265 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
269 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, dcdc, uV / 1000);
295 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_DC1_VSEL_MASK;
296 wm8350_reg_write(wm8350, volt_reg, val | sel);
302 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
308 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER)
310 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
311 val | wm8350->pmic.dcdc1_hib_mode);
314 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER)
316 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
317 val | wm8350->pmic.dcdc3_hib_mode);
320 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER)
322 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
323 val | wm8350->pmic.dcdc4_hib_mode);
326 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER)
328 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
329 val | wm8350->pmic.dcdc6_hib_mode);
342 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
348 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
349 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
350 wm8350_reg_write(wm8350, WM8350_DCDC1_LOW_POWER,
354 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
355 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
356 wm8350_reg_write(wm8350, WM8350_DCDC3_LOW_POWER,
360 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
361 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
362 wm8350_reg_write(wm8350, WM8350_DCDC4_LOW_POWER,
366 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
367 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
368 wm8350_reg_write(wm8350, WM8350_DCDC6_LOW_POWER,
382 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
388 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
390 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
394 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
396 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
407 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
413 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
415 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
419 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
421 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
433 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
439 hib_mode = &wm8350->pmic.dcdc1_hib_mode;
442 hib_mode = &wm8350->pmic.dcdc3_hib_mode;
445 hib_mode = &wm8350->pmic.dcdc4_hib_mode;
448 hib_mode = &wm8350->pmic.dcdc6_hib_mode;
480 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
484 dev_dbg(wm8350->dev, "%s %d mV %d\n", __func__, ldo, uV / 1000);
508 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_VSEL_MASK;
509 wm8350_reg_write(wm8350, volt_reg, val | sel);
515 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
537 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
538 wm8350_reg_write(wm8350, volt_reg, val);
544 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
566 val = wm8350_reg_read(wm8350, volt_reg) & ~WM8350_LDO1_HIB_MODE_MASK;
567 wm8350_reg_write(wm8350, volt_reg, val | WM8350_LDO1_HIB_MODE_DIS);
571 int wm8350_dcdc_set_slot(struct wm8350 *wm8350, int dcdc, u16 start,
577 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
607 val = wm8350_reg_read(wm8350, slot_reg) &
610 wm8350_reg_write(wm8350, slot_reg,
619 int wm8350_ldo_set_slot(struct wm8350 *wm8350, int ldo, u16 start, u16 stop)
624 dev_dbg(wm8350->dev, "%s %d start %d stop %d\n",
648 val = wm8350_reg_read(wm8350, slot_reg) & ~WM8350_LDO1_SDSLOT_MASK;
649 wm8350_reg_write(wm8350, slot_reg, val | ((start << 10) | (stop << 6)));
654 int wm8350_dcdc25_set_mode(struct wm8350 *wm8350, int dcdc, u16 mode,
659 dev_dbg(wm8350->dev, "%s %d mode: %s %s\n", __func__, dcdc,
664 val = wm8350_reg_read(wm8350, WM8350_DCDC2_CONTROL)
667 wm8350_reg_write(wm8350, WM8350_DCDC2_CONTROL, val |
674 val = wm8350_reg_read(wm8350, WM8350_DCDC5_CONTROL)
677 wm8350_reg_write(wm8350, WM8350_DCDC5_CONTROL, val |
691 static int force_continuous_enable(struct wm8350 *wm8350, int dcdc, int enable)
713 ret = wm8350_set_bits(wm8350, reg,
716 ret = wm8350_clear_bits(wm8350, reg,
723 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
738 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
739 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
740 force_continuous_enable(wm8350, dcdc, 1);
744 wm8350_set_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
745 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
746 force_continuous_enable(wm8350, dcdc, 0);
750 force_continuous_enable(wm8350, dcdc, 0);
751 wm8350_clear_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
752 wm8350_clear_bits(wm8350, WM8350_DCDC_ACTIVE_OPTIONS, val);
756 force_continuous_enable(wm8350, dcdc, 0);
757 wm8350_set_bits(wm8350, WM8350_DCDC_SLEEP_OPTIONS, val);
766 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
790 active = wm8350_reg_read(wm8350, WM8350_DCDC_ACTIVE_OPTIONS) & mask;
791 force = wm8350_reg_read(wm8350, reg) & WM8350_DCDC1_FORCE_PWM_ENA;
792 sleep = wm8350_reg_read(wm8350, WM8350_DCDC_SLEEP_OPTIONS) & mask;
794 dev_dbg(wm8350->dev, "mask %x active %x sleep %x force %x",
1106 struct wm8350 *wm8350 = dev_get_drvdata(&pdev->dev);
1118 val = wm8350_reg_read(wm8350, WM8350_DCDC1_LOW_POWER);
1119 wm8350->pmic.dcdc1_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1122 val = wm8350_reg_read(wm8350, WM8350_DCDC3_LOW_POWER);
1123 wm8350->pmic.dcdc3_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1126 val = wm8350_reg_read(wm8350, WM8350_DCDC4_LOW_POWER);
1127 wm8350->pmic.dcdc4_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1130 val = wm8350_reg_read(wm8350, WM8350_DCDC6_LOW_POWER);
1131 wm8350->pmic.dcdc6_hib_mode = val & WM8350_DCDC_HIB_MODE_MASK;
1138 config.regmap = wm8350->regmap;
1150 ret = wm8350_register_irq(wm8350, wm8350_reg[pdev->id].irq,
1164 struct wm8350 *wm8350 = rdev_get_drvdata(rdev);
1166 wm8350_free_irq(wm8350, wm8350_reg[pdev->id].irq, rdev);
1171 int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
1179 if (wm8350->pmic.pdev[reg])
1183 reg > wm8350->pmic.max_dcdc)
1186 reg > wm8350->pmic.max_isink)
1189 pdev = platform_device_alloc("wm8350-regulator", reg);
1193 wm8350->pmic.pdev[reg] = pdev;
1195 initdata->driver_data = wm8350;
1198 pdev->dev.parent = wm8350->dev;
1199 platform_set_drvdata(pdev, wm8350);
1204 dev_err(wm8350->dev, "Failed to register regulator %d: %d\n",
1207 wm8350->pmic.pdev[reg] = NULL;
1217 * @wm8350: The WM8350 device to configure.
1230 int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
1237 if (lednum >= ARRAY_SIZE(wm8350->pmic.led) || lednum < 0) {
1238 dev_err(wm8350->dev, "Invalid LED index %d\n", lednum);
1242 led = &wm8350->pmic.led[lednum];
1245 dev_err(wm8350->dev, "LED %d already allocated\n", lednum);
1249 pdev = platform_device_alloc("wm8350-led", lednum);
1251 dev_err(wm8350->dev, "Failed to allocate LED %d\n", lednum);
1264 ret = wm8350_register_regulator(wm8350, isink, &led->isink_init);
1276 ret = wm8350_register_regulator(wm8350, dcdc, &led->dcdc_init);
1284 wm8350->pmic.isink_A_dcdc = dcdc;
1287 wm8350->pmic.isink_B_dcdc = dcdc;
1292 pdev->dev.parent = wm8350->dev;
1295 dev_err(wm8350->dev, "Failed to register LED %d: %d\n",
1311 .name = "wm8350-regulator",
1331 MODULE_ALIAS("platform:wm8350-regulator");