Lines Matching refs:ret
45 int ret;
47 ret = pm_runtime_get_sync(priv->dev);
48 if (ret < 0) {
50 return ret;
63 ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
65 if (ret) {
75 return ret;
82 int ret;
84 ret = pm_runtime_get_sync(priv->dev);
85 if (ret < 0) {
87 return ret;
103 int ret;
105 ret = pm_runtime_get_sync(priv->dev);
106 if (ret < 0) {
108 return ret;
111 ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
116 return ret;
124 int ret;
126 ret = pm_runtime_get_sync(priv->dev);
127 if (ret < 0) {
129 return ret;
146 int ret;
148 ret = pm_runtime_get_sync(priv->dev);
149 if (ret < 0) {
151 return ret;
155 ret = FIELD_GET(STM32_VRS, val);
160 return ret;
188 int ret;
210 ret = clk_prepare_enable(priv->clk);
211 if (ret) {
212 dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
225 ret = PTR_ERR(rdev);
226 dev_err(&pdev->dev, "register failed with error %d\n", ret);
243 return ret;