Lines Matching refs:omsg_ring
1679 spin_lock_irqsave(&priv->omsg_ring[mbox].lock, flags);
1681 tx_slot = priv->omsg_ring[mbox].tx_slot;
1684 memcpy(priv->omsg_ring[mbox].omq_base[tx_slot], buffer, len);
1690 desc = priv->omsg_ring[mbox].omd_base;
1701 cpu_to_le32((u64)priv->omsg_ring[mbox].omq_phys[tx_slot] &
1704 cpu_to_le32((u64)priv->omsg_ring[mbox].omq_phys[tx_slot] >> 32);
1706 priv->omsg_ring[mbox].wr_count++;
1709 if (++priv->omsg_ring[mbox].tx_slot == priv->omsg_ring[mbox].size) {
1710 priv->omsg_ring[mbox].tx_slot = 0;
1712 priv->omsg_ring[mbox].wr_count++;
1718 iowrite32(priv->omsg_ring[mbox].wr_count,
1722 spin_unlock_irqrestore(&priv->omsg_ring[mbox].lock, flags);
1742 spin_lock(&priv->omsg_ring[ch].lock);
1760 srd_ptr = priv->omsg_ring[ch].sts_rdptr;
1761 sts_ptr = priv->omsg_ring[ch].sts_base;
1771 srd_ptr %= priv->omsg_ring[ch].sts_size;
1778 priv->omsg_ring[ch].sts_rdptr = srd_ptr;
1786 tx_slot = (last_ptr - (u64)priv->omsg_ring[ch].omd_phys)/
1794 if (tx_slot == priv->omsg_ring[ch].size) {
1797 (u64)priv->omsg_ring[ch].omd_phys)/
1803 if (tx_slot >= priv->omsg_ring[ch].size)
1806 tx_slot, priv->omsg_ring[ch].size);
1807 WARN_ON(tx_slot >= priv->omsg_ring[ch].size);
1811 if (tx_slot == priv->omsg_ring[ch].size)
1814 dev_id = priv->omsg_ring[ch].dev_id;
1836 dev_id = priv->omsg_ring[ch].dev_id;
1837 tx_slot = priv->omsg_ring[ch].tx_slot;
1841 iowrite32(priv->omsg_ring[ch].tx_slot,
1844 priv->omsg_ring[ch].wr_count = priv->omsg_ring[ch].tx_slot;
1845 priv->omsg_ring[ch].sts_rdptr = 0;
1860 spin_unlock(&priv->omsg_ring[ch].lock);
1892 priv->omsg_ring[mbox].dev_id = dev_id;
1893 priv->omsg_ring[mbox].size = entries;
1894 priv->omsg_ring[mbox].sts_rdptr = 0;
1895 spin_lock_init(&priv->omsg_ring[mbox].lock);
1900 priv->omsg_ring[mbox].omq_base[i] =
1903 &priv->omsg_ring[mbox].omq_phys[i],
1905 if (priv->omsg_ring[mbox].omq_base[i] == NULL) {
1914 priv->omsg_ring[mbox].omd_base = dma_alloc_coherent(
1917 &priv->omsg_ring[mbox].omd_phys, GFP_KERNEL);
1918 if (priv->omsg_ring[mbox].omd_base == NULL) {
1925 priv->omsg_ring[mbox].tx_slot = 0;
1928 priv->omsg_ring[mbox].sts_size = roundup_pow_of_two(entries + 1);
1929 priv->omsg_ring[mbox].sts_base = dma_alloc_coherent(&priv->pdev->dev,
1930 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts),
1931 &priv->omsg_ring[mbox].sts_phys,
1933 if (priv->omsg_ring[mbox].sts_base == NULL) {
1945 iowrite32(((u64)priv->omsg_ring[mbox].omd_phys >> 32),
1947 iowrite32(((u64)priv->omsg_ring[mbox].omd_phys &
1952 iowrite32(((u64)priv->omsg_ring[mbox].sts_phys >> 32),
1954 iowrite32(((u64)priv->omsg_ring[mbox].sts_phys &
1957 iowrite32(TSI721_DMAC_DSSZ_SIZE(priv->omsg_ring[mbox].sts_size),
1994 bd_ptr = priv->omsg_ring[mbox].omd_base;
1998 cpu_to_le32((u64)priv->omsg_ring[mbox].omd_phys &
2001 cpu_to_le32((u64)priv->omsg_ring[mbox].omd_phys >> 32);
2002 priv->omsg_ring[mbox].wr_count = 0;
2018 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts),
2019 priv->omsg_ring[mbox].sts_base,
2020 priv->omsg_ring[mbox].sts_phys);
2022 priv->omsg_ring[mbox].sts_base = NULL;
2028 priv->omsg_ring[mbox].omd_base,
2029 priv->omsg_ring[mbox].omd_phys);
2031 priv->omsg_ring[mbox].omd_base = NULL;
2034 for (i = 0; i < priv->omsg_ring[mbox].size; i++) {
2035 if (priv->omsg_ring[mbox].omq_base[i]) {
2038 priv->omsg_ring[mbox].omq_base[i],
2039 priv->omsg_ring[mbox].omq_phys[i]);
2041 priv->omsg_ring[mbox].omq_base[i] = NULL;
2078 priv->omsg_ring[mbox].sts_size * sizeof(struct tsi721_dma_sts),
2079 priv->omsg_ring[mbox].sts_base,
2080 priv->omsg_ring[mbox].sts_phys);
2082 priv->omsg_ring[mbox].sts_base = NULL;
2086 (priv->omsg_ring[mbox].size + 1) *
2088 priv->omsg_ring[mbox].omd_base,
2089 priv->omsg_ring[mbox].omd_phys);
2091 priv->omsg_ring[mbox].omd_base = NULL;
2094 for (i = 0; i < priv->omsg_ring[mbox].size; i++) {
2095 if (priv->omsg_ring[mbox].omq_base[i]) {
2098 priv->omsg_ring[mbox].omq_base[i],
2099 priv->omsg_ring[mbox].omq_phys[i]);
2101 priv->omsg_ring[mbox].omq_base[i] = NULL;