Lines Matching refs:hwpwm
41 static inline u32 zx_pwm_readl(struct zx_pwm_chip *zpc, unsigned int hwpwm,
44 return readl(zpc->base + (hwpwm + 1) * 0x10 + offset);
47 static inline void zx_pwm_writel(struct zx_pwm_chip *zpc, unsigned int hwpwm,
50 writel(value, zpc->base + (hwpwm + 1) * 0x10 + offset);
53 static void zx_pwm_set_mask(struct zx_pwm_chip *zpc, unsigned int hwpwm,
58 data = zx_pwm_readl(zpc, hwpwm, offset);
61 zx_pwm_writel(zpc, hwpwm, offset, data);
73 value = zx_pwm_readl(zpc, pwm->hwpwm, ZX_PWM_MODE);
88 tmp = zx_pwm_readl(zpc, pwm->hwpwm, ZX_PWM_PERIOD);
92 tmp = zx_pwm_readl(zpc, pwm->hwpwm, ZX_PWM_DUTY);
134 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE, ZX_PWM_EN, 0);
137 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE, ZX_PWM_CLKDIV_MASK,
139 zx_pwm_writel(zpc, pwm->hwpwm, ZX_PWM_PERIOD, period_cycles);
140 zx_pwm_writel(zpc, pwm->hwpwm, ZX_PWM_DUTY, duty_cycles);
144 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE,
160 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE, ZX_PWM_POLAR,
178 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE,
181 zx_pwm_set_mask(zpc, pwm->hwpwm, ZX_PWM_MODE,