Lines Matching refs:period_cycles
111 unsigned long period_cycles[NUM_PWM_CHANNEL];
215 * period_ns = 10^9 * (ps_divval * period_cycles) / PWM_CLK_RATE
222 u32 period_cycles, duty_cycles;
233 period_cycles = (unsigned long)c;
235 if (period_cycles < 1) {
236 period_cycles = 1;
250 if (pc->period_cycles[i] &&
251 (pc->period_cycles[i] != period_cycles)) {
266 pc->period_cycles[pwm->hwpwm] = period_cycles;
269 if (set_prescale_div(period_cycles/PERIOD_MAX, &ps_divval,
281 period_cycles = period_cycles / ps_divval;
287 ehrpwm_write(pc->mmio_base, TBPRD, period_cycles);
401 pc->period_cycles[pwm->hwpwm] = 0;