Lines Matching refs:val
107 u32 val, unsigned long offset)
109 writel(val, chip->base + offset);
118 u32 val;
123 val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
130 if ((val & BIT_CH(PWM_BYPASS, pwm->hwpwm)) &&
139 if ((PWM_REG_PRESCAL(val, pwm->hwpwm) == PWM_PRESCAL_MASK) &&
143 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)];
148 if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm))
153 if ((val & BIT_CH(PWM_CLK_GATING | PWM_EN, pwm->hwpwm)) ==
159 val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm));
161 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val);
164 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val);
236 u32 ctrl, duty = 0, period = 0, val;
285 val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
286 sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));