Lines Matching refs:ctrl
236 u32 ctrl, duty = 0, period = 0, val;
262 ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
266 ctrl |= BIT_CH(PWM_BYPASS, pwm->hwpwm);
268 sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
273 ctrl &= ~BIT_CH(PWM_BYPASS, pwm->hwpwm);
276 if (PWM_REG_PRESCAL(ctrl, pwm->hwpwm) != prescaler) {
278 ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
279 sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
281 ctrl &= ~BIT_CH(PWM_PRESCAL_MASK, pwm->hwpwm);
282 ctrl |= BIT_CH(prescaler, pwm->hwpwm);
291 ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
293 ctrl |= BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
295 ctrl |= BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
298 ctrl |= BIT_CH(PWM_EN, pwm->hwpwm);
300 sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);
319 ctrl = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
320 ctrl &= ~BIT_CH(PWM_CLK_GATING, pwm->hwpwm);
321 ctrl &= ~BIT_CH(PWM_EN, pwm->hwpwm);
322 sun4i_pwm_writel(sun4i_pwm, ctrl, PWM_CTRL_REG);