Lines Matching defs:bits
43 * Each channel occupies 4 bits in TCON register, but there is a gap of 4
44 * bits (one channel) after channel 0, so channels have different numbering
48 * in its set of bits is 2 as opposed to 3 for other channels.
116 /* TCON register has a gap of 4 bits (1 channel) after channel 0 */
126 u8 bits;
128 bits = (fls(divisor) - 1) - pwm->variant.div_base;
134 reg |= bits << shift;
196 if (variant->bits < 32) {
199 if ((rate >> (variant->bits + div)) < freq)
203 * Other variants have enough counter bits to generate any
313 * by 32bits.
439 .bits = 16,
446 .bits = 32,
453 .bits = 32,
460 .bits = 32,