Lines Matching refs:pwm
18 #include <linux/pwm.h>
92 static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value)
94 void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET
95 + pwm->channel * TPU_CHANNEL_SIZE;
100 static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm,
105 dev_dbg(&pwm->tpu->pdev->dev, "%u: configuring pin as %s\n",
106 pwm->channel, states[state]);
110 tpu_pwm_write(pwm, TPU_TIORn,
111 pwm->polarity == PWM_POLARITY_INVERSED ?
115 tpu_pwm_write(pwm, TPU_TIORn,
116 pwm->polarity == PWM_POLARITY_INVERSED ?
120 tpu_pwm_write(pwm, TPU_TIORn,
121 pwm->polarity == PWM_POLARITY_INVERSED ?
127 static void tpu_pwm_start_stop(struct tpu_pwm_device *pwm, int start)
132 spin_lock_irqsave(&pwm->tpu->lock, flags);
133 value = ioread16(pwm->tpu->base + TPU_TSTR);
136 value |= 1 << pwm->channel;
138 value &= ~(1 << pwm->channel);
140 iowrite16(value, pwm->tpu->base + TPU_TSTR);
141 spin_unlock_irqrestore(&pwm->tpu->lock, flags);
144 static int tpu_pwm_timer_start(struct tpu_pwm_device *pwm)
148 if (!pwm->timer_on) {
150 pm_runtime_get_sync(&pwm->tpu->pdev->dev);
151 ret = clk_prepare_enable(pwm->tpu->clk);
153 dev_err(&pwm->tpu->pdev->dev, "cannot enable clock\n");
156 pwm->timer_on = true;
164 tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);
165 tpu_pwm_start_stop(pwm, false);
175 tpu_pwm_write(pwm, TPU_TCRn, TPU_TCR_CCLR_TGRB | TPU_TCR_CKEG_RISING |
176 pwm->prescaler);
177 tpu_pwm_write(pwm, TPU_TMDRn, TPU_TMDR_MD_PWM);
178 tpu_pwm_set_pin(pwm, TPU_PIN_PWM);
179 tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);
180 tpu_pwm_write(pwm, TPU_TGRBn, pwm->period);
182 dev_dbg(&pwm->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",
183 pwm->channel, pwm->duty, pwm->period);
186 tpu_pwm_start_stop(pwm, true);
191 static void tpu_pwm_timer_stop(struct tpu_pwm_device *pwm)
193 if (!pwm->timer_on)
197 tpu_pwm_start_stop(pwm, false);
200 clk_disable_unprepare(pwm->tpu->clk);
201 pm_runtime_put(&pwm->tpu->pdev->dev);
203 pwm->timer_on = false;
213 struct tpu_pwm_device *pwm;
218 pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);
219 if (pwm == NULL)
222 pwm->tpu = tpu;
223 pwm->channel = _pwm->hwpwm;
224 pwm->polarity = PWM_POLARITY_NORMAL;
225 pwm->prescaler = 0;
226 pwm->period = 0;
227 pwm->duty = 0;
229 pwm->timer_on = false;
231 pwm_set_chip_data(_pwm, pwm);
238 struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
240 tpu_pwm_timer_stop(pwm);
241 kfree(pwm);
248 struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
288 if (pwm->prescaler == prescaler && pwm->period == period)
291 pwm->prescaler = prescaler;
292 pwm->period = period;
293 pwm->duty = duty;
299 if (duty_only && pwm->timer_on) {
305 tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);
306 dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", pwm->channel,
307 pwm->duty);
310 ret = tpu_pwm_timer_start(pwm);
320 tpu_pwm_set_pin(pwm, duty ? TPU_PIN_ACTIVE : TPU_PIN_INACTIVE);
321 tpu_pwm_timer_stop(pwm);
330 struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
332 pwm->polarity = polarity;
339 struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
342 ret = tpu_pwm_timer_start(pwm);
350 if (pwm->duty == 0 || pwm->duty == pwm->period) {
351 tpu_pwm_set_pin(pwm, pwm->duty ?
353 tpu_pwm_timer_stop(pwm);
361 struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
364 tpu_pwm_timer_start(pwm);
365 tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);
366 tpu_pwm_timer_stop(pwm);
458 .name = "renesas-tpu-pwm",
468 MODULE_ALIAS("platform:renesas-tpu-pwm");