Lines Matching refs:meson
122 struct meson_pwm *meson = to_meson_pwm(chip);
131 channel = &meson->channels[pwm->hwpwm];
155 struct meson_pwm *meson = to_meson_pwm(chip);
156 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
162 static int meson_pwm_calc(struct meson_pwm *meson, struct pwm_device *pwm,
165 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
184 dev_err(meson->chip.dev, "invalid source clock frequency\n");
188 dev_dbg(meson->chip.dev, "fin_freq: %lu Hz\n", fin_freq);
192 dev_err(meson->chip.dev, "unable to get period pre_div\n");
198 dev_err(meson->chip.dev, "unable to get period cnt\n");
202 dev_dbg(meson->chip.dev, "period=%llu pre_div=%u cnt=%u\n", period,
217 dev_err(meson->chip.dev, "unable to get duty cycle\n");
221 dev_dbg(meson->chip.dev, "duty=%llu pre_div=%u duty_cnt=%u\n",
232 static void meson_pwm_enable(struct meson_pwm *meson, struct pwm_device *pwm)
234 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
241 spin_lock_irqsave(&meson->lock, flags);
243 value = readl(meson->base + REG_MISC_AB);
247 writel(value, meson->base + REG_MISC_AB);
251 writel(value, meson->base + channel_data->reg_offset);
253 value = readl(meson->base + REG_MISC_AB);
255 writel(value, meson->base + REG_MISC_AB);
257 spin_unlock_irqrestore(&meson->lock, flags);
260 static void meson_pwm_disable(struct meson_pwm *meson, struct pwm_device *pwm)
265 spin_lock_irqsave(&meson->lock, flags);
267 value = readl(meson->base + REG_MISC_AB);
269 writel(value, meson->base + REG_MISC_AB);
271 spin_unlock_irqrestore(&meson->lock, flags);
277 struct meson_pwm *meson = to_meson_pwm(chip);
278 struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
302 meson_pwm_enable(meson, pwm);
304 meson_pwm_disable(meson, pwm);
307 err = meson_pwm_calc(meson, pwm, state);
311 meson_pwm_enable(meson, pwm);
320 struct meson_pwm *meson = to_meson_pwm(chip);
326 channel = &meson->channels[pwm->hwpwm];
340 struct meson_pwm *meson = to_meson_pwm(chip);
348 channel = &meson->channels[pwm->hwpwm];
351 value = readl(meson->base + REG_MISC_AB);
359 value = readl(meson->base + channel_data->reg_offset);
469 .compatible = "amlogic,meson-gxbb-pwm",
473 .compatible = "amlogic,meson-gxbb-ao-pwm",
477 .compatible = "amlogic,meson-axg-ee-pwm",
481 .compatible = "amlogic,meson-axg-ao-pwm",
485 .compatible = "amlogic,meson-g12a-ee-pwm",
489 .compatible = "amlogic,meson-g12a-ao-pwm-ab",
493 .compatible = "amlogic,meson-g12a-ao-pwm-cd",
500 static int meson_pwm_init_channels(struct meson_pwm *meson)
502 struct device *dev = meson->chip.dev;
508 for (i = 0; i < meson->chip.npwm; i++) {
509 struct meson_pwm_channel *channel = &meson->channels[i];
516 init.parent_names = meson->data->parent_names;
517 init.num_parents = meson->data->num_parents;
519 channel->mux.reg = meson->base + REG_MISC_AB;
524 channel->mux.lock = &meson->lock;
547 struct meson_pwm *meson;
551 meson = devm_kzalloc(&pdev->dev, sizeof(*meson), GFP_KERNEL);
552 if (!meson)
556 meson->base = devm_ioremap_resource(&pdev->dev, regs);
557 if (IS_ERR(meson->base))
558 return PTR_ERR(meson->base);
560 spin_lock_init(&meson->lock);
561 meson->chip.dev = &pdev->dev;
562 meson->chip.ops = &meson_pwm_ops;
563 meson->chip.base = -1;
564 meson->chip.npwm = MESON_NUM_PWMS;
565 meson->chip.of_xlate = of_pwm_xlate_with_flags;
566 meson->chip.of_pwm_n_cells = 3;
568 meson->data = of_device_get_match_data(&pdev->dev);
570 err = meson_pwm_init_channels(meson);
574 err = pwmchip_add(&meson->chip);
580 platform_set_drvdata(pdev, meson);
587 struct meson_pwm *meson = platform_get_drvdata(pdev);
589 return pwmchip_remove(&meson->chip);
594 .name = "meson-pwm",