Lines Matching defs:imx
98 static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)
102 ret = clk_prepare_enable(imx->clk_ipg);
106 ret = clk_prepare_enable(imx->clk_per);
108 clk_disable_unprepare(imx->clk_ipg);
115 static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)
117 clk_disable_unprepare(imx->clk_per);
118 clk_disable_unprepare(imx->clk_ipg);
124 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
129 ret = pwm_imx27_clk_prepare_enable(imx);
133 val = readl(imx->mmio_base + MX3_PWMCR);
152 pwm_clk = clk_get_rate(imx->clk_per);
153 val = readl(imx->mmio_base + MX3_PWMPR);
165 val = readl(imx->mmio_base + MX3_PWMSAR);
167 val = imx->duty_cycle;
172 pwm_imx27_clk_disable_unprepare(imx);
177 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
182 writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
185 cr = readl(imx->mmio_base + MX3_PWMCR);
196 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
202 sr = readl(imx->mmio_base + MX3_PWMSR);
209 sr = readl(imx->mmio_base + MX3_PWMSR);
219 struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
228 clkrate = clk_get_rate(imx->clk_per);
243 * according to imx pwm RM, the real period value should be PERIOD
258 ret = pwm_imx27_clk_prepare_enable(imx);
265 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
266 writel(period_cycles, imx->mmio_base + MX3_PWMPR);
272 imx->duty_cycle = duty_cycles;
286 writel(cr, imx->mmio_base + MX3_PWMCR);
289 pwm_imx27_clk_disable_unprepare(imx);
308 struct pwm_imx27_chip *imx;
312 imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
313 if (imx == NULL)
316 platform_set_drvdata(pdev, imx);
318 imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
319 if (IS_ERR(imx->clk_ipg)) {
320 int ret = PTR_ERR(imx->clk_ipg);
329 imx->clk_per = devm_clk_get(&pdev->dev, "per");
330 if (IS_ERR(imx->clk_per)) {
331 int ret = PTR_ERR(imx->clk_per);
341 imx->chip.ops = &pwm_imx27_ops;
342 imx->chip.dev = &pdev->dev;
343 imx->chip.base = -1;
344 imx->chip.npwm = 1;
346 imx->chip.of_xlate = of_pwm_xlate_with_flags;
347 imx->chip.of_pwm_n_cells = 3;
349 imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);
350 if (IS_ERR(imx->mmio_base))
351 return PTR_ERR(imx->mmio_base);
353 ret = pwm_imx27_clk_prepare_enable(imx);
358 pwmcr = readl(imx->mmio_base + MX3_PWMCR);
360 pwm_imx27_clk_disable_unprepare(imx);
362 return pwmchip_add(&imx->chip);
367 struct pwm_imx27_chip *imx;
369 imx = platform_get_drvdata(pdev);
371 return pwmchip_remove(&imx->chip);