Lines Matching refs:tpm
92 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
96 rate = clk_get_rate(tpm->clk);
139 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
144 state->period = tpm->real_period;
147 rate = clk_get_rate(tpm->clk);
148 val = readl(tpm->base + PWM_IMX_TPM_SC);
150 tmp = readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
155 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
175 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
182 if (state->period != tpm->real_period) {
189 if (tpm->user_count > 1)
192 val = readl(tpm->base + PWM_IMX_TPM_SC);
201 writel(val, tpm->base + PWM_IMX_TPM_SC);
211 writel(p->mod, tpm->base + PWM_IMX_TPM_MOD);
212 tpm->real_period = state->period;
231 writel(p->val, tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm));
237 timeout = jiffies + msecs_to_jiffies(tpm->real_period /
239 while (readl(tpm->base + PWM_IMX_TPM_MOD) != p->mod
240 || readl(tpm->base + PWM_IMX_TPM_CnV(pwm->hwpwm))
254 val = readl(tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
270 writel(val, tpm->base + PWM_IMX_TPM_CnSC(pwm->hwpwm));
274 val = readl(tpm->base + PWM_IMX_TPM_SC);
276 if (++tpm->enable_count == 1)
279 if (--tpm->enable_count == 0)
282 writel(val, tpm->base + PWM_IMX_TPM_SC);
292 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
301 mutex_lock(&tpm->lock);
303 mutex_unlock(&tpm->lock);
310 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
312 mutex_lock(&tpm->lock);
313 tpm->user_count++;
314 mutex_unlock(&tpm->lock);
321 struct imx_tpm_pwm_chip *tpm = to_imx_tpm_pwm_chip(chip);
323 mutex_lock(&tpm->lock);
324 tpm->user_count--;
325 mutex_unlock(&tpm->lock);
338 struct imx_tpm_pwm_chip *tpm;
342 tpm = devm_kzalloc(&pdev->dev, sizeof(*tpm), GFP_KERNEL);
343 if (!tpm)
346 platform_set_drvdata(pdev, tpm);
348 tpm->base = devm_platform_ioremap_resource(pdev, 0);
349 if (IS_ERR(tpm->base))
350 return PTR_ERR(tpm->base);
352 tpm->clk = devm_clk_get(&pdev->dev, NULL);
353 if (IS_ERR(tpm->clk)) {
354 ret = PTR_ERR(tpm->clk);
361 ret = clk_prepare_enable(tpm->clk);
368 tpm->chip.dev = &pdev->dev;
369 tpm->chip.ops = &imx_tpm_pwm_ops;
370 tpm->chip.base = -1;
371 tpm->chip.of_xlate = of_pwm_xlate_with_flags;
372 tpm->chip.of_pwm_n_cells = 3;
375 val = readl(tpm->base + PWM_IMX_TPM_PARAM);
376 tpm->chip.npwm = FIELD_GET(PWM_IMX_TPM_PARAM_CHAN, val);
378 mutex_init(&tpm->lock);
380 ret = pwmchip_add(&tpm->chip);
383 clk_disable_unprepare(tpm->clk);
391 struct imx_tpm_pwm_chip *tpm = platform_get_drvdata(pdev);
392 int ret = pwmchip_remove(&tpm->chip);
394 clk_disable_unprepare(tpm->clk);
401 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev);
403 if (tpm->enable_count > 0)
411 tpm->real_period = 0;
413 clk_disable_unprepare(tpm->clk);
420 struct imx_tpm_pwm_chip *tpm = dev_get_drvdata(dev);
423 ret = clk_prepare_enable(tpm->clk);
443 .name = "imx7ulp-tpm-pwm",