Lines Matching defs:pwm
7 * Based on drivers/pwm/pwm-tegra.c, Copyright (c) 2010, NVIDIA Corporation
19 #include <linux/pwm.h>
92 static int img_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
138 val &= ~(PWM_CTRL_CFG_DIV_MASK << PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm));
140 PWM_CTRL_CFG_DIV_SHIFT(pwm->hwpwm);
145 img_pwm_writel(pwm_chip, PWM_CH_CFG(pwm->hwpwm), val);
153 static int img_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
164 val |= BIT(pwm->hwpwm);
169 PERIP_PWM_PDM_CONTROL_CH_SHIFT(pwm->hwpwm), 0);
174 static void img_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
180 val &= ~BIT(pwm->hwpwm);
200 .compatible = "img,pistachio-pwm",
230 dev_err(dev, "could not prepare or enable pwm clock\n");
244 struct img_pwm_chip *pwm;
247 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
248 if (!pwm)
251 pwm->dev = &pdev->dev;
254 pwm->base = devm_ioremap_resource(&pdev->dev, res);
255 if (IS_ERR(pwm->base))
256 return PTR_ERR(pwm->base);
261 pwm->data = of_dev_id->data;
263 pwm->periph_regs = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
265 if (IS_ERR(pwm->periph_regs))
266 return PTR_ERR(pwm->periph_regs);
268 pwm->sys_clk = devm_clk_get(&pdev->dev, "sys");
269 if (IS_ERR(pwm->sys_clk)) {
271 return PTR_ERR(pwm->sys_clk);
274 pwm->pwm_clk = devm_clk_get(&pdev->dev, "pwm");
275 if (IS_ERR(pwm->pwm_clk)) {
276 dev_err(&pdev->dev, "failed to get pwm clock\n");
277 return PTR_ERR(pwm->pwm_clk);
280 platform_set_drvdata(pdev, pwm);
291 clk_rate = clk_get_rate(pwm->pwm_clk);
293 dev_err(&pdev->dev, "pwm clock has no frequency\n");
299 val = (u64)NSEC_PER_SEC * 512 * pwm->data->max_timebase;
301 pwm->max_period_ns = val;
305 pwm->min_period_ns = val;
307 pwm->chip.dev = &pdev->dev;
308 pwm->chip.ops = &img_pwm_ops;
309 pwm->chip.base = -1;
310 pwm->chip.npwm = IMG_PWM_NPWM;
312 ret = pwmchip_add(&pwm->chip);
403 .name = "img-pwm",