Lines Matching defs:value
75 u32 value;
77 value = readl(address);
78 value &= ~mask;
79 value |= (data & mask);
80 writel(value, address);
136 u32 freq, value;
141 value = readl(base + PWM_CFG0_ADDR(pwm->hwpwm));
142 state->period = div_u64(value * 1000, freq);
144 value = readl(base + PWM_CFG1_ADDR(pwm->hwpwm));
145 state->duty_cycle = div_u64(value * 1000, freq);
147 value = readl(base + PWM_CTRL_ADDR(pwm->hwpwm));
148 state->enabled = (PWM_ENABLE_MASK & value);
149 state->polarity = (PWM_POLARITY_MASK & value) ? PWM_POLARITY_INVERSED : PWM_POLARITY_NORMAL;