Lines Matching refs:cycles
96 u64 cycles;
98 cycles = clk_get_rate(pwm->clk);
99 cycles *= period_ns;
100 do_div(cycles, NSEC_PER_SEC);
102 if (cycles > BERLIN_PWM_MAX_TCNT) {
104 cycles >>= 12; // Prescaled by 4096
106 if (cycles > BERLIN_PWM_MAX_TCNT)
110 period = cycles;
111 cycles *= duty_ns;
112 do_div(cycles, period_ns);
113 duty = cycles;