Lines Matching defs:idt82p33
80 static int idt82p33_xfer(struct idt82p33 *idt82p33,
86 struct i2c_client *client = idt82p33->client;
112 static int idt82p33_page_offset(struct idt82p33 *idt82p33, unsigned char val)
116 if (idt82p33->page_offset == val)
119 err = idt82p33_xfer(idt82p33, PAGE_ADDR, &val, sizeof(val), 1);
121 dev_err(&idt82p33->client->dev,
124 idt82p33->page_offset = val;
129 static int idt82p33_rdwr(struct idt82p33 *idt82p33, unsigned int regaddr,
138 err = idt82p33_page_offset(idt82p33, page);
142 err = idt82p33_xfer(idt82p33, offset, buf, count, write);
147 static int idt82p33_read(struct idt82p33 *idt82p33, unsigned int regaddr,
150 return idt82p33_rdwr(idt82p33, regaddr, buf, count, false);
153 static int idt82p33_write(struct idt82p33 *idt82p33, unsigned int regaddr,
156 return idt82p33_rdwr(idt82p33, regaddr, buf, count, true);
162 struct idt82p33 *idt82p33 = channel->idt82p33;
169 err = idt82p33_read(idt82p33, channel->dpll_mode_cnfg,
178 err = idt82p33_write(idt82p33, channel->dpll_mode_cnfg,
191 struct idt82p33 *idt82p33 = channel->idt82p33;
200 err = idt82p33_write(idt82p33, channel->dpll_tod_trigger,
206 if (idt82p33->calculate_overhead_flag)
207 idt82p33->start_time = ktime_get_raw();
209 err = idt82p33_read(idt82p33, channel->dpll_tod_sts, buf, sizeof(buf));
228 struct idt82p33 *idt82p33 = channel->idt82p33;
239 err = idt82p33_write(idt82p33, channel->dpll_tod_trigger,
245 if (idt82p33->calculate_overhead_flag) {
247 - ktime_to_ns(idt82p33->start_time);
251 idt82p33->calculate_overhead_flag = 0;
260 err = idt82p33_write(idt82p33, channel->dpll_tod_cnfg + i,
271 struct idt82p33 *idt82p33 = channel->idt82p33;
276 idt82p33->calculate_overhead_flag = 1;
284 now_ns += delta_ns + idt82p33->tod_write_overhead_ns;
295 struct idt82p33 *idt82p33 = channel->idt82p33;
338 err = idt82p33_write(idt82p33, channel->dpll_freq_cnfg,
350 struct idt82p33 *idt82p33 = channel->idt82p33;
366 err = idt82p33_write(idt82p33, channel->dpll_tod_trigger,
385 struct idt82p33 *idt82p33 = channel->idt82p33;
393 idt82p33->tod_write_overhead_ns = 0;
401 err = idt82p33_write(idt82p33,
413 idt82p33->tod_write_overhead_ns = div_s64(total_ns,
444 struct idt82p33 *idt82p33 = channel->idt82p33;
447 idt82p33->tod_write_overhead_ns = 0;
467 idt82p33->tod_write_overhead_ns -= trailing_overhead_ns;
472 static int idt82p33_check_and_set_masks(struct idt82p33 *idt82p33,
481 dev_err(&idt82p33->client->dev,
485 idt82p33->pll_mask = val;
489 idt82p33->channel[0].output_mask = val;
492 idt82p33->channel[1].output_mask = val;
498 static void idt82p33_display_masks(struct idt82p33 *idt82p33)
502 dev_info(&idt82p33->client->dev,
503 "pllmask = 0x%02x\n", idt82p33->pll_mask);
508 if (mask & idt82p33->pll_mask)
509 dev_info(&idt82p33->client->dev,
511 i, idt82p33->channel[i].output_mask);
517 struct idt82p33 *idt82p33 = channel->idt82p33;
529 err = idt82p33_read(idt82p33, channel->dpll_sync_cnfg,
539 err = idt82p33_write(idt82p33, channel->dpll_sync_cnfg,
558 struct idt82p33 *idt82p33 = channel->idt82p33;
560 mutex_lock(&idt82p33->reg_lock);
564 mutex_unlock(&idt82p33->reg_lock);
569 struct idt82p33 *idt82p33 = channel->idt82p33;
578 err = idt82p33_read(idt82p33, OUT_MUX_CNFG(outn),
588 err = idt82p33_write(idt82p33, OUT_MUX_CNFG(outn),
603 struct idt82p33 *idt82p33 = channel->idt82p33;
609 err = idt82p33_write(idt82p33, channel->dpll_input_mode_cnfg,
632 static void idt82p33_ptp_clock_unregister_all(struct idt82p33 *idt82p33)
639 channel = &idt82p33->channel[i];
653 struct idt82p33 *idt82p33 = channel->idt82p33;
658 mutex_lock(&idt82p33->reg_lock);
672 mutex_unlock(&idt82p33->reg_lock);
681 struct idt82p33 *idt82p33 = channel->idt82p33;
684 mutex_lock(&idt82p33->reg_lock);
686 mutex_unlock(&idt82p33->reg_lock);
695 struct idt82p33 *idt82p33 = channel->idt82p33;
698 mutex_lock(&idt82p33->reg_lock);
701 mutex_unlock(&idt82p33->reg_lock);
708 mutex_unlock(&idt82p33->reg_lock);
714 mutex_unlock(&idt82p33->reg_lock);
723 struct idt82p33 *idt82p33 = channel->idt82p33;
726 mutex_lock(&idt82p33->reg_lock);
728 mutex_unlock(&idt82p33->reg_lock);
738 struct idt82p33 *idt82p33 = channel->idt82p33;
741 mutex_lock(&idt82p33->reg_lock);
743 mutex_unlock(&idt82p33->reg_lock);
794 static int idt82p33_enable_channel(struct idt82p33 *idt82p33, u32 index)
802 channel = &idt82p33->channel[index];
808 channel->idt82p33 = idt82p33;
834 dev_info(&idt82p33->client->dev, "PLL%d registered as ptp%d\n",
840 static int idt82p33_load_firmware(struct idt82p33 *idt82p33)
848 dev_dbg(&idt82p33->client->dev,
851 err = request_firmware(&fw, FW_FILENAME, &idt82p33->client->dev);
856 dev_dbg(&idt82p33->client->dev, "firmware size %zu bytes\n", fw->size);
863 dev_err(&idt82p33->client->dev,
873 err = idt82p33_check_and_set_masks(idt82p33, page,
887 err = idt82p33_write(idt82p33, _ADDR(page, loaddr),
895 idt82p33_display_masks(idt82p33);
905 struct idt82p33 *idt82p33;
911 idt82p33 = devm_kzalloc(&client->dev,
912 sizeof(struct idt82p33), GFP_KERNEL);
913 if (!idt82p33)
916 mutex_init(&idt82p33->reg_lock);
918 idt82p33->client = client;
919 idt82p33->page_offset = 0xff;
920 idt82p33->tod_write_overhead_ns = 0;
921 idt82p33->calculate_overhead_flag = 0;
922 idt82p33->pll_mask = DEFAULT_PLL_MASK;
923 idt82p33->channel[0].output_mask = DEFAULT_OUTPUT_MASK_PLL0;
924 idt82p33->channel[1].output_mask = DEFAULT_OUTPUT_MASK_PLL1;
926 mutex_lock(&idt82p33->reg_lock);
928 err = idt82p33_load_firmware(idt82p33);
931 dev_warn(&idt82p33->client->dev,
934 if (idt82p33->pll_mask) {
936 if (idt82p33->pll_mask & (1 << i)) {
937 err = idt82p33_enable_channel(idt82p33, i);
943 dev_err(&idt82p33->client->dev,
948 mutex_unlock(&idt82p33->reg_lock);
951 idt82p33_ptp_clock_unregister_all(idt82p33);
955 i2c_set_clientdata(client, idt82p33);
962 struct idt82p33 *idt82p33 = i2c_get_clientdata(client);
964 idt82p33_ptp_clock_unregister_all(idt82p33);
965 mutex_destroy(&idt82p33->reg_lock);
1001 .name = "idt82p33",