Lines Matching defs:idtcm
128 static int idtcm_xfer_read(struct idtcm *idtcm,
133 struct i2c_client *client = idtcm->client;
166 static int idtcm_xfer_write(struct idtcm *idtcm,
171 struct i2c_client *client = idtcm->client;
197 static int idtcm_page_offset(struct idtcm *idtcm, u8 val)
202 if (idtcm->page_offset == val)
210 err = idtcm_xfer_write(idtcm, PAGE_ADDR, buf, sizeof(buf));
213 idtcm->page_offset = 0xff;
214 dev_err(&idtcm->client->dev, "failed to set page offset\n");
216 idtcm->page_offset = val;
222 static int _idtcm_rdwr(struct idtcm *idtcm,
235 err = idtcm_page_offset(idtcm, hi);
241 return idtcm_xfer_write(idtcm, lo, buf, count);
243 return idtcm_xfer_read(idtcm, lo, buf, count);
246 static int idtcm_read(struct idtcm *idtcm,
252 return _idtcm_rdwr(idtcm, module + regaddr, buf, count, false);
255 static int idtcm_write(struct idtcm *idtcm,
261 return _idtcm_rdwr(idtcm, module + regaddr, buf, count, true);
267 struct idtcm *idtcm = channel->idtcm;
273 err = idtcm_read(idtcm, channel->tod_read_primary,
282 err = idtcm_write(idtcm, channel->tod_read_primary,
290 if (idtcm->calculate_overhead_flag)
291 idtcm->start_time = ktime_get_raw();
293 err = idtcm_read(idtcm, channel->tod_read_primary,
304 err = idtcm_read(idtcm, channel->tod_read_primary,
315 static int _sync_pll_output(struct idtcm *idtcm,
370 err = idtcm_write(idtcm, 0, sync_ctrl1, &val, sizeof(val));
374 err = idtcm_write(idtcm, 0, sync_ctrl0, &sync_src, sizeof(sync_src));
387 err = idtcm_write(idtcm, 0, sync_ctrl1, &val, sizeof(val));
393 err = idtcm_read(idtcm, 0, HW_Q8_CTRL_SPARE,
400 err = idtcm_write(idtcm, 0, HW_Q8_CTRL_SPARE,
407 err = idtcm_write(idtcm, 0, HW_Q8_CTRL_SPARE,
415 err = idtcm_read(idtcm, 0, HW_Q11_CTRL_SPARE,
422 err = idtcm_write(idtcm, 0, HW_Q11_CTRL_SPARE,
429 err = idtcm_write(idtcm, 0, HW_Q11_CTRL_SPARE,
437 err = idtcm_write(idtcm, 0, sync_ctrl1, &val, sizeof(val));
468 struct idtcm *idtcm = channel->idtcm;
485 err = idtcm_read(idtcm, 0, HW_Q8_CTRL_SPARE,
494 err = idtcm_read(idtcm, 0, HW_Q11_CTRL_SPARE,
540 err = _sync_pll_output(idtcm, pll, sync_src, qn,
554 struct idtcm *idtcm = channel->idtcm;
563 err = idtcm_read(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1,
572 err = idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1,
585 err = idtcm_write(idtcm, channel->hw_dpll_n,
595 err = idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_CTRL_1,
600 if (idtcm->calculate_overhead_flag) {
603 - idtcm->start_time)
604 + idtcm->tod_write_overhead_ns
609 idtcm->calculate_overhead_flag = 0;
617 err = idtcm_write(idtcm, channel->hw_dpll_n,
629 struct idtcm *idtcm = channel->idtcm;
641 err = idtcm_write(idtcm, channel->tod_write, TOD_WRITE,
647 err = idtcm_read(idtcm, channel->tod_write, TOD_WRITE_CMD,
657 err = idtcm_write(idtcm, channel->tod_write, TOD_WRITE_CMD,
668 err = idtcm_read(idtcm, channel->tod_write, TOD_WRITE_CMD,
677 dev_err(&idtcm->client->dev,
690 struct idtcm *idtcm = channel->idtcm;
702 err = idtcm_read(idtcm, channel->hw_dpll_n,
716 dev_err(&idtcm->client->dev,
740 struct idtcm *idtcm = channel->idtcm;
749 err = idtcm_write(idtcm, channel->dpll_phase_pull_in, PULL_IN_OFFSET,
760 struct idtcm *idtcm = channel->idtcm;
772 err = idtcm_write(idtcm, channel->dpll_phase_pull_in,
781 struct idtcm *idtcm = channel->idtcm;
785 err = idtcm_read(idtcm, channel->dpll_phase_pull_in, PULL_IN_CTRL,
793 err = idtcm_write(idtcm, channel->dpll_phase_pull_in,
825 struct idtcm *idtcm = channel->idtcm;
837 idtcm_write(idtcm, channel->hw_dpll_n, HW_DPLL_TOD_OVR__0,
844 err = idtcm_write(idtcm, channel->hw_dpll_n,
862 idtcm->tod_write_overhead_ns = lowest_ns;
870 struct idtcm *idtcm = channel->idtcm;
877 idtcm->calculate_overhead_flag = 1;
900 static int idtcm_state_machine_reset(struct idtcm *idtcm)
905 err = idtcm_write(idtcm, RESET_CTRL, SM_RESET, &byte, sizeof(byte));
913 static int idtcm_read_hw_rev_id(struct idtcm *idtcm, u8 *hw_rev_id)
915 return idtcm_read(idtcm, HW_REVISION, REV_ID, hw_rev_id, sizeof(u8));
918 static int idtcm_read_product_id(struct idtcm *idtcm, u16 *product_id)
923 err = idtcm_read(idtcm, GENERAL_STATUS, PRODUCT_ID, buf, sizeof(buf));
930 static int idtcm_read_major_release(struct idtcm *idtcm, u8 *major)
935 err = idtcm_read(idtcm, GENERAL_STATUS, MAJ_REL, &buf, sizeof(buf));
942 static int idtcm_read_minor_release(struct idtcm *idtcm, u8 *minor)
944 return idtcm_read(idtcm, GENERAL_STATUS, MIN_REL, minor, sizeof(u8));
947 static int idtcm_read_hotfix_release(struct idtcm *idtcm, u8 *hotfix)
949 return idtcm_read(idtcm,
956 static int idtcm_read_otp_scsr_config_select(struct idtcm *idtcm,
959 return idtcm_read(idtcm, GENERAL_STATUS, OTP_SCSR_CONFIG_SELECT,
963 static int set_pll_output_mask(struct idtcm *idtcm, u16 addr, u8 val)
969 SET_U16_LSB(idtcm->channel[0].output_mask, val);
972 SET_U16_MSB(idtcm->channel[0].output_mask, val);
975 SET_U16_LSB(idtcm->channel[1].output_mask, val);
978 SET_U16_MSB(idtcm->channel[1].output_mask, val);
981 SET_U16_LSB(idtcm->channel[2].output_mask, val);
984 SET_U16_MSB(idtcm->channel[2].output_mask, val);
987 SET_U16_LSB(idtcm->channel[3].output_mask, val);
990 SET_U16_MSB(idtcm->channel[3].output_mask, val);
1000 static int set_tod_ptp_pll(struct idtcm *idtcm, u8 index, u8 pll)
1003 dev_err(&idtcm->client->dev, "ToD%d not supported\n", index);
1008 dev_err(&idtcm->client->dev, "Pll%d not supported\n", pll);
1012 idtcm->channel[index].pll = pll;
1017 static int check_and_set_masks(struct idtcm *idtcm,
1026 dev_err(&idtcm->client->dev,
1030 idtcm->tod_mask = val;
1034 err = set_tod_ptp_pll(idtcm, 0, val);
1037 err = set_tod_ptp_pll(idtcm, 1, val);
1040 err = set_tod_ptp_pll(idtcm, 2, val);
1043 err = set_tod_ptp_pll(idtcm, 3, val);
1046 err = set_pll_output_mask(idtcm, regaddr, val);
1053 static void display_pll_and_masks(struct idtcm *idtcm)
1058 dev_dbg(&idtcm->client->dev, "tod_mask = 0x%02x\n", idtcm->tod_mask);
1063 if (mask & idtcm->tod_mask)
1064 dev_dbg(&idtcm->client->dev,
1066 i, idtcm->channel[i].pll,
1067 idtcm->channel[i].output_mask);
1071 static int idtcm_load_firmware(struct idtcm *idtcm,
1086 dev_dbg(&idtcm->client->dev, "requesting firmware '%s'\n", fname);
1091 dev_err(&idtcm->client->dev,
1098 dev_dbg(&idtcm->client->dev, "firmware size %zu bytes\n", fw->size);
1103 idtcm_state_machine_reset(idtcm);
1108 dev_err(&idtcm->client->dev,
1120 err = check_and_set_masks(idtcm, regaddr, val);
1136 err = idtcm_write(idtcm, regaddr, 0, &val, sizeof(val));
1143 display_pll_and_masks(idtcm);
1153 struct idtcm *idtcm = channel->idtcm;
1157 err = idtcm_read(idtcm, OUTPUT_MODULE_FROM_INDEX(outn),
1168 return idtcm_write(idtcm, OUTPUT_MODULE_FROM_INDEX(outn),
1215 struct idtcm *idtcm = channel->idtcm;
1219 err = idtcm_read(idtcm, channel->dpll_n, DPLL_MODE,
1230 err = idtcm_write(idtcm, channel->dpll_n, DPLL_MODE,
1249 struct idtcm *idtcm = channel->idtcm;
1292 err = idtcm_write(idtcm, channel->dpll_phase, DPLL_WR_PHASE,
1300 struct idtcm *idtcm = channel->idtcm;
1344 err = idtcm_write(idtcm, channel->dpll_freq, DPLL_WR_FREQ,
1354 struct idtcm *idtcm = channel->idtcm;
1357 mutex_lock(&idtcm->reg_lock);
1362 dev_err(&idtcm->client->dev,
1367 mutex_unlock(&idtcm->reg_lock);
1377 struct idtcm *idtcm = channel->idtcm;
1380 mutex_lock(&idtcm->reg_lock);
1385 dev_err(&idtcm->client->dev,
1390 mutex_unlock(&idtcm->reg_lock);
1400 struct idtcm *idtcm = channel->idtcm;
1403 mutex_lock(&idtcm->reg_lock);
1408 dev_err(&idtcm->client->dev,
1413 mutex_unlock(&idtcm->reg_lock);
1422 struct idtcm *idtcm = channel->idtcm;
1425 mutex_lock(&idtcm->reg_lock);
1430 dev_err(&idtcm->client->dev,
1435 mutex_unlock(&idtcm->reg_lock);
1444 struct idtcm *idtcm = channel->idtcm;
1452 dev_err(&idtcm->client->dev,
1467 mutex_lock(&idtcm->reg_lock);
1472 dev_err(&idtcm->client->dev,
1477 mutex_unlock(&idtcm->reg_lock);
1487 struct idtcm *idtcm = channel->idtcm;
1491 mutex_lock(&idtcm->reg_lock);
1496 dev_err(&idtcm->client->dev,
1501 mutex_unlock(&idtcm->reg_lock);
1511 struct idtcm *idtcm = channel->idtcm;
1515 mutex_lock(&idtcm->reg_lock);
1520 dev_err(&idtcm->client->dev,
1525 mutex_unlock(&idtcm->reg_lock);
1543 dev_err(&channel->idtcm->client->dev,
1557 dev_err(&channel->idtcm->client->dev,
1569 static int _enable_pll_tod_sync(struct idtcm *idtcm,
1644 err = idtcm_read(idtcm, out0, OUT_CTRL_1, &val, sizeof(val));
1651 err = idtcm_write(idtcm, out0, OUT_CTRL_1, &val, sizeof(val));
1658 err = idtcm_read(idtcm, out1, OUT_CTRL_1, &val, sizeof(val));
1665 err = idtcm_write(idtcm, out1, OUT_CTRL_1, &val, sizeof(val));
1672 err = idtcm_read(idtcm, dpll, DPLL_TOD_SYNC_CFG, &val, sizeof(val));
1680 return idtcm_write(idtcm, dpll, DPLL_TOD_SYNC_CFG, &val, sizeof(val));
1685 struct idtcm *idtcm = channel->idtcm;
1701 err = idtcm_read(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg));
1707 err = idtcm_write(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg));
1728 err = idtcm_read(idtcm, 0, HW_Q8_CTRL_SPARE,
1737 err = idtcm_read(idtcm, 0, HW_Q11_CTRL_SPARE,
1783 err = _enable_pll_tod_sync(idtcm, pll, sync_src, qn,
1795 struct idtcm *idtcm = channel->idtcm;
1803 err = idtcm_read(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg));
1809 err = idtcm_write(idtcm, channel->tod_n, TOD_CFG, &cfg, sizeof(cfg));
1816 static void idtcm_display_version_info(struct idtcm *idtcm)
1826 idtcm_read_major_release(idtcm, &major);
1827 idtcm_read_minor_release(idtcm, &minor);
1828 idtcm_read_hotfix_release(idtcm, &hotfix);
1830 idtcm_read_product_id(idtcm, &product_id);
1831 idtcm_read_hw_rev_id(idtcm, &hw_rev_id);
1833 idtcm_read_otp_scsr_config_select(idtcm, &config_select);
1835 snprintf(idtcm->version, sizeof(idtcm->version), "%u.%u.%u",
1838 dev_info(&idtcm->client->dev, fmt, major, minor, hotfix,
1944 static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
1952 channel = &idtcm->channel[index];
1985 channel->idtcm = idtcm;
1987 if (idtcm_strverscmp(idtcm->version, "4.8.7") >= 0)
1995 if (idtcm_strverscmp(idtcm->version, "4.8.7") >= 0) {
1998 dev_err(&idtcm->client->dev,
2008 dev_err(&idtcm->client->dev,
2017 dev_err(&idtcm->client->dev,
2037 dev_info(&idtcm->client->dev, "PLL%d registered as ptp%d\n",
2043 static void ptp_clock_unregister_all(struct idtcm *idtcm)
2050 channel = &idtcm->channel[i];
2057 static void set_default_masks(struct idtcm *idtcm)
2059 idtcm->tod_mask = DEFAULT_TOD_MASK;
2061 idtcm->channel[0].pll = DEFAULT_TOD0_PTP_PLL;
2062 idtcm->channel[1].pll = DEFAULT_TOD1_PTP_PLL;
2063 idtcm->channel[2].pll = DEFAULT_TOD2_PTP_PLL;
2064 idtcm->channel[3].pll = DEFAULT_TOD3_PTP_PLL;
2066 idtcm->channel[0].output_mask = DEFAULT_OUTPUT_MASK_PLL0;
2067 idtcm->channel[1].output_mask = DEFAULT_OUTPUT_MASK_PLL1;
2068 idtcm->channel[2].output_mask = DEFAULT_OUTPUT_MASK_PLL2;
2069 idtcm->channel[3].output_mask = DEFAULT_OUTPUT_MASK_PLL3;
2075 struct idtcm *idtcm;
2083 idtcm = devm_kzalloc(&client->dev, sizeof(struct idtcm), GFP_KERNEL);
2085 if (!idtcm)
2088 idtcm->client = client;
2089 idtcm->page_offset = 0xff;
2090 idtcm->calculate_overhead_flag = 0;
2092 set_default_masks(idtcm);
2094 mutex_init(&idtcm->reg_lock);
2095 mutex_lock(&idtcm->reg_lock);
2097 idtcm_display_version_info(idtcm);
2099 err = idtcm_load_firmware(idtcm, &client->dev);
2102 dev_warn(&idtcm->client->dev,
2105 if (idtcm->tod_mask) {
2107 if (idtcm->tod_mask & (1 << i)) {
2108 err = idtcm_enable_channel(idtcm, i);
2110 dev_err(&idtcm->client->dev,
2120 dev_err(&idtcm->client->dev,
2125 mutex_unlock(&idtcm->reg_lock);
2128 ptp_clock_unregister_all(idtcm);
2132 i2c_set_clientdata(client, idtcm);
2139 struct idtcm *idtcm = i2c_get_clientdata(client);
2141 ptp_clock_unregister_all(idtcm);
2143 mutex_destroy(&idtcm->reg_lock);
2223 .name = "idtcm",