Lines Matching refs:reg_data

51 	u8 reg_data;
64 	ret = max14577_read_reg(rmap, MAX14577_CHG_REG_CHG_CTRL2, &reg_data);
68 	if ((reg_data & CHGCTRL2_MBCHOSTEN_MASK) == 0) {
73 	ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, &reg_data);
77 	if (reg_data & STATUS3_CGMBC_MASK) {
79 		if (reg_data & STATUS3_EOC_MASK)
124 	u8 reg_data;
128 	ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, &reg_data);
132 	reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
133 	chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
164 	u8 reg_data;
167 	ret = max14577_read_reg(rmap, MAX14577_MUIC_REG_STATUS2, &reg_data);
171 	reg_data = ((reg_data & STATUS2_CHGTYP_MASK) >> STATUS2_CHGTYP_SHIFT);
172 	chg_type = maxim_get_charger_type(chg->max14577->dev_type, reg_data);
178 	ret = max14577_read_reg(rmap, MAX14577_CHG_REG_STATUS3, &reg_data);
182 	if (reg_data & STATUS3_OVP_MASK) {
209 	u8 reg_data;
213 		reg_data = hours - 3;
217 		reg_data = 0x7;
224 	reg_data <<= CHGCTRL1_TCHW_SHIFT;
227 			MAX14577_REG_CHGCTRL1, CHGCTRL1_TCHW_MASK, reg_data);
233 	u8 reg_data;
240 		reg_data = 0x0;
242 		reg_data = 0x1f;
249 			reg_data = 0x1 + val;
251 			reg_data = val; /* Fix for gap between 4.18V and 4.22V */
255 	reg_data <<= CHGCTRL3_MBCCVWRC_SHIFT;
258 			MAX14577_CHG_REG_CHG_CTRL3, reg_data);
265 	u8 reg_data;
294 	reg_data = current_bits << CHGCTRL5_EOCS_SHIFT;
298 			reg_data);
304 	u8 reg_data;
309 	ret = maxim_charger_calc_reg_current(limits, uamp, uamp, &reg_data);
318 			reg_data);
329 	u8 reg_data;
337 	reg_data = 0x1 << CDETCTRL1_CHGDETEN_SHIFT;
340 			reg_data);
346 	reg_data = 0x1 << CHGCTRL2_VCHGR_RC_SHIFT;
347 	reg_data |= 0x1 << CHGCTRL2_MBCHOSTEN_SHIFT;
348 	max14577_write_reg(rmap, MAX14577_REG_CHGCTRL2, reg_data);
351 	reg_data = 0x0 << CHGCTRL6_AUTOSTOP_SHIFT;
352 	max14577_write_reg(rmap, MAX14577_REG_CHGCTRL6, reg_data);
374 		reg_data = 0x0;
379 		reg_data = 0x1 + (chg->pdata->ovp_uvolt - 6000000) / 500000;
386 	reg_data <<= CHGCTRL7_OTPCGHCVS_SHIFT;
387 	max14577_write_reg(rmap, MAX14577_REG_CHGCTRL7, reg_data);
512 	u8 reg_data;
517 			&reg_data);
521 	reg_data &= CHGCTRL1_TCHW_MASK;
522 	reg_data >>= CHGCTRL1_TCHW_SHIFT;
523 	switch (reg_data) {
525 		val = reg_data + 3;