Lines Matching defs:pmx

28 static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg)
30 return readl(pmx->regs[bank] + reg);
33 static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg)
35 writel_relaxed(val, pmx->regs[bank] + reg);
37 pmx_readl(pmx, bank, reg);
42 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
44 return pmx->soc->ngroups;
50 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
52 return pmx->soc->groups[group].name;
60 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
62 *pins = pmx->soc->groups[group].pins;
63 *num_pins = pmx->soc->groups[group].npins;
223 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
225 return pmx->soc->nfunctions;
231 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
233 return pmx->soc->functions[function].name;
241 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
243 *groups = pmx->soc->functions[function].groups;
244 *num_groups = pmx->soc->functions[function].ngroups;
253 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
258 g = &pmx->soc->groups[group];
270 val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
273 pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
282 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
286 if (!pmx->soc->sfsel_in_mux)
289 group = &pmx->soc->groups[offset];
294 value = pmx_readl(pmx, group->mux_bank, group->mux_reg);
296 pmx_writel(pmx, value, group->mux_bank, group->mux_reg);
305 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
309 if (!pmx->soc->sfsel_in_mux)
312 group = &pmx->soc->groups[offset];
317 value = pmx_readl(pmx, group->mux_bank, group->mux_reg);
319 pmx_writel(pmx, value, group->mux_bank, group->mux_reg);
331 static int tegra_pinconf_reg(struct tegra_pmx *pmx,
381 if (pmx->soc->hsm_in_mux) {
392 if (pmx->soc->schmitt_in_mux) {
433 if (pmx->soc->drvtype_in_mux) {
444 dev_err(pmx->dev, "Invalid config param %04x\n", param);
460 dev_err(pmx->dev,
488 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
497 g = &pmx->soc->groups[group];
499 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, &reg, &bit,
504 val = pmx_readl(pmx, bank, reg);
517 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
526 g = &pmx->soc->groups[group];
532 ret = tegra_pinconf_reg(pmx, g, param, true, &bank, &reg, &bit,
537 val = pmx_readl(pmx, bank, reg);
563 pmx_writel(pmx, val, bank, reg);
587 struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
594 g = &pmx->soc->groups[group];
597 ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false,
602 val = pmx_readl(pmx, bank, reg);
656 static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)
662 for (i = 0; i < pmx->soc->ngroups; ++i) {
663 g = &pmx->soc->groups[i];
675 val = pmx_readl(pmx, bank, reg);
677 pmx_writel(pmx, val, bank, reg);
695 struct tegra_pmx *pmx = dev_get_drvdata(dev);
696 u32 *backup_regs = pmx->backup_regs;
701 for (i = 0; i < pmx->nbanks; i++) {
703 regs = pmx->regs[i];
708 return pinctrl_force_sleep(pmx->pctl);
713 struct tegra_pmx *pmx = dev_get_drvdata(dev);
714 u32 *backup_regs = pmx->backup_regs;
719 for (i = 0; i < pmx->nbanks; i++) {
721 regs = pmx->regs[i];
727 readl_relaxed(pmx->regs[0]);
738 static bool tegra_pinctrl_gpio_node_has_range(struct tegra_pmx *pmx)
743 np = of_find_compatible_node(NULL, NULL, pmx->soc->gpio_compatible);
757 struct tegra_pmx *pmx;
764 pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
765 if (!pmx)
768 pmx->dev = &pdev->dev;
769 pmx->soc = soc_data;
775 pmx->group_pins = devm_kcalloc(&pdev->dev,
776 soc_data->ngroups * 4, sizeof(*pmx->group_pins),
778 if (!pmx->group_pins)
781 group_pins = pmx->group_pins;
799 BUG_ON(group_pins - pmx->group_pins >=
806 tegra_pinctrl_gpio_range.npins = pmx->soc->ngpios;
808 tegra_pinctrl_desc.pins = pmx->soc->pins;
809 tegra_pinctrl_desc.npins = pmx->soc->npins;
817 pmx->nbanks = i;
819 pmx->regs = devm_kcalloc(&pdev->dev, pmx->nbanks, sizeof(*pmx->regs),
821 if (!pmx->regs)
824 pmx->backup_regs = devm_kzalloc(&pdev->dev, backup_regs_size,
826 if (!pmx->backup_regs)
829 for (i = 0; i < pmx->nbanks; i++) {
830 pmx->regs[i] = devm_platform_ioremap_resource(pdev, i);
831 if (IS_ERR(pmx->regs[i]))
832 return PTR_ERR(pmx->regs[i]);
835 pmx->pctl = devm_pinctrl_register(&pdev->dev, &tegra_pinctrl_desc, pmx);
836 if (IS_ERR(pmx->pctl)) {
838 return PTR_ERR(pmx->pctl);
841 tegra_pinctrl_clear_parked_bits(pmx);
843 if (pmx->soc->ngpios > 0 && !tegra_pinctrl_gpio_node_has_range(pmx))
844 pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
846 platform_set_drvdata(pdev, pmx);