Lines Matching refs:reg
101 * @reg: pin register address
109 unsigned long reg;
392 unsigned long reg;
422 reg = readl((void __iomem *)pin->reg);
423 reg &= ~PIN_FUNC_MASK;
424 reg |= val;
425 writel(reg, (void __iomem *)pin->reg);
444 unsigned int reg, arg;
450 reg = (readl((void __iomem *)pin->reg) >>
453 reg = readl((void __iomem *)pin->reg);
458 arg = reg;
462 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
465 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
468 arg = reg & SLEEP_OUTPUT_MASK;
471 if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
477 arg = (reg >> DRIVE_STRENGTH_SHIFT) &
482 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
484 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
487 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
491 arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
493 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
496 if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
497 (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
596 unsigned long reg;
724 reg = readl((void __iomem *)pin->reg);
725 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
727 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
729 writel(reg, (void __iomem *)pin->reg);
731 reg = readl((void __iomem *)pin->reg);
732 reg &= ~(mask << shift);
733 reg |= val;
734 writel(reg, (void __iomem *)pin->reg);
795 *config = (readl((void __iomem *)pin->reg) >>
798 *config = readl((void __iomem *)pin->reg);
1009 unsigned int reg;
1014 reg = sprd_soc_pin_info[i].reg;
1016 pin->reg = (unsigned long)sprd_pctl->base +
1017 PINCTRL_REG_LEN * reg;
1022 pin->reg = (unsigned long)sprd_pctl->base +
1027 pin->reg = (unsigned long)sprd_pctl->base +
1035 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
1037 pin->bit_offset, pin->bit_width, pin->reg);