Lines Matching refs:regv
5003 unsigned long regv;
5010 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5011 regv &= ~(ANA_CLEAR_MASK << conf->ad_ctrl_bit);
5012 writel(regv | (ad_sel << conf->ad_ctrl_bit),
5015 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5017 bank, conf->ad_ctrl_reg, regv);
5047 unsigned long regv;
5080 regv = readl(pmx->regs[bank] + conf->mux_reg);
5081 regv &= ~(FUNC_CLEAR_MASK << conf->mux_bit);
5082 writel(regv | (func << conf->mux_bit),
5085 regv = readl(pmx->regs[bank] + conf->mux_reg);
5087 bank, conf->mux_reg, regv);
5165 unsigned long regv;
5173 regv = pull_info->s2v[sel].data & pull_info->mask;
5177 writel(regv << conf->pupd_bit, pull_sel_reg);
5483 unsigned long regv;
5492 regv = readl(pmx->regs[bank] + conf->mux_reg);
5493 status->func = (regv >> conf->mux_bit) & FUNC_CLEAR_MASK;
5499 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5500 if (!(regv & (conf->ad_ctrl_bit << ANA_CLEAR_MASK)))
5509 regv = readl(pmx->regs[bank] + conf->drvstr_reg);
5510 status->dstr = (regv >> conf->drvstr_bit) & ds_info->mask;
5515 regv = readl(pmx->regs[bank] + conf->pupd_reg);
5516 regv = (regv >> conf->pupd_bit) & pull_info->mask;
5517 status->pull = pull_info->v2s[regv].data;