Lines Matching defs:conf
5000 struct atlas7_pad_config *conf,
5006 writel(ANA_CLEAR_MASK << conf->ad_ctrl_bit,
5007 pmx->regs[bank] + CLR_REG(conf->ad_ctrl_reg));
5010 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5011 regv &= ~(ANA_CLEAR_MASK << conf->ad_ctrl_bit);
5012 writel(regv | (ad_sel << conf->ad_ctrl_bit),
5013 pmx->regs[bank] + conf->ad_ctrl_reg);
5015 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5017 bank, conf->ad_ctrl_reg, regv);
5022 struct atlas7_pad_config *conf, u32 bank)
5025 if (conf->type != PAD_T_AD)
5028 return __atlas7_pmx_pin_ad_sel(pmx, conf, bank, 0);
5032 struct atlas7_pad_config *conf, u32 bank)
5035 if (conf->type != PAD_T_AD)
5038 return __atlas7_pmx_pin_ad_sel(pmx, conf, bank, 1);
5044 struct atlas7_pad_config *conf;
5053 conf = &pmx->pctl_data->confs[pin];
5058 ret = __atlas7_pmx_pin_analog_enable(pmx, conf, bank);
5067 ret = __atlas7_pmx_pin_digital_enable(pmx, conf, bank);
5076 writel(FUNC_CLEAR_MASK << conf->mux_bit,
5077 pmx->regs[bank] + CLR_REG(conf->mux_reg));
5080 regv = readl(pmx->regs[bank] + conf->mux_reg);
5081 regv &= ~(FUNC_CLEAR_MASK << conf->mux_bit);
5082 writel(regv | (func << conf->mux_bit),
5083 pmx->regs[bank] + conf->mux_reg);
5085 regv = readl(pmx->regs[bank] + conf->mux_reg);
5087 bank, conf->mux_reg, regv);
5162 struct atlas7_pad_config *conf = &pmx->pctl_data->confs[pin];
5169 pull_info = &atlas7_pull_map[conf->type];
5170 pull_sel_reg = pmx->regs[bank] + conf->pupd_reg;
5176 writel(pull_info->mask << conf->pupd_bit, CLR_REG(pull_sel_reg));
5177 writel(regv << conf->pupd_bit, pull_sel_reg);
5188 struct atlas7_pad_config *conf = &pmx->pctl_data->confs[pin];
5193 ds_info = &atlas7_ds_map[conf->type];
5198 ds_sel_reg = pmx->regs[bank] + conf->drvstr_reg;
5200 writel(ds_info->imval << conf->drvstr_bit, CLR_REG(ds_sel_reg));
5201 writel(sel << conf->drvstr_bit, ds_sel_reg);
5207 pin, conf->type, sel);
5215 struct atlas7_pad_config *conf = &pmx->pctl_data->confs[pin];
5216 u32 type = conf->type;
5220 sel = convert_current_to_drive_strength(conf->type, ma);
5478 struct atlas7_pad_config *conf;
5487 conf = &pmx->pctl_data->confs[idx];
5492 regv = readl(pmx->regs[bank] + conf->mux_reg);
5493 status->func = (regv >> conf->mux_bit) & FUNC_CLEAR_MASK;
5496 if (conf->ad_ctrl_reg == -1)
5499 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg);
5500 if (!(regv & (conf->ad_ctrl_bit << ANA_CLEAR_MASK)))
5504 if (conf->drvstr_reg == -1)
5508 ds_info = &atlas7_ds_map[conf->type];
5509 regv = readl(pmx->regs[bank] + conf->drvstr_reg);
5510 status->dstr = (regv >> conf->drvstr_bit) & ds_info->mask;
5514 pull_info = &atlas7_pull_map[conf->type];
5515 regv = readl(pmx->regs[bank] + conf->pupd_reg);
5516 regv = (regv >> conf->pupd_bit) & pull_info->mask;