Lines Matching refs:pfc
8 #define DRV_NAME "sh-pfc"
38 struct sh_pfc *pfc;
52 return pmx->pfc->info->nr_groups;
60 return pmx->pfc->info->groups[selector].name;
68 *pins = pmx->pfc->info->groups[selector].pins;
69 *num_pins = pmx->pfc->info->groups[selector].nr_pins;
108 struct device *dev = pmx->pfc->dev;
263 struct device *dev = pmx->pfc->dev;
318 return pmx->pfc->info->nr_functions;
326 return pmx->pfc->info->functions[selector].name;
336 *groups = pmx->pfc->info->functions[selector].groups;
337 *num_groups = pmx->pfc->info->functions[selector].nr_groups;
346 struct sh_pfc *pfc = pmx->pfc;
347 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group];
354 spin_lock_irqsave(&pfc->lock, flags);
357 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
369 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION);
376 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]);
384 spin_unlock_irqrestore(&pfc->lock, flags);
393 struct sh_pfc *pfc = pmx->pfc;
394 int idx = sh_pfc_get_pin_index(pfc, offset);
399 spin_lock_irqsave(&pfc->lock, flags);
401 if (!pfc->gpio) {
405 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
407 ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
417 spin_unlock_irqrestore(&pfc->lock, flags);
427 struct sh_pfc *pfc = pmx->pfc;
428 int idx = sh_pfc_get_pin_index(pfc, offset);
432 spin_lock_irqsave(&pfc->lock, flags);
436 sh_pfc_config_mux(pfc, cfg->mux_mark, PINMUX_TYPE_FUNCTION);
437 spin_unlock_irqrestore(&pfc->lock, flags);
445 struct sh_pfc *pfc = pmx->pfc;
447 int idx = sh_pfc_get_pin_index(pfc, offset);
448 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
462 spin_lock_irqsave(&pfc->lock, flags);
464 ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type);
469 spin_unlock_irqrestore(&pfc->lock, flags);
483 static u32 sh_pfc_pinconf_find_drive_strength_reg(struct sh_pfc *pfc,
490 for (reg = pfc->info->drive_regs; reg->reg; ++reg) {
506 static int sh_pfc_pinconf_get_drive_strength(struct sh_pfc *pfc,
515 reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
519 spin_lock_irqsave(&pfc->lock, flags);
520 val = sh_pfc_read(pfc, reg);
521 spin_unlock_irqrestore(&pfc->lock, flags);
531 static int sh_pfc_pinconf_set_drive_strength(struct sh_pfc *pfc,
541 reg = sh_pfc_pinconf_find_drive_strength_reg(pfc, pin, &offset, &size);
555 spin_lock_irqsave(&pfc->lock, flags);
557 val = sh_pfc_read(pfc, reg);
561 sh_pfc_write(pfc, reg, val);
563 spin_unlock_irqrestore(&pfc->lock, flags);
569 static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin,
572 int idx = sh_pfc_get_pin_index(pfc, _pin);
573 const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
600 struct sh_pfc *pfc = pmx->pfc;
605 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
614 if (!pfc->info->ops || !pfc->info->ops->get_bias)
617 spin_lock_irqsave(&pfc->lock, flags);
618 bias = pfc->info->ops->get_bias(pfc, _pin);
619 spin_unlock_irqrestore(&pfc->lock, flags);
631 ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin);
643 if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
646 bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
650 spin_lock_irqsave(&pfc->lock, flags);
651 val = sh_pfc_read(pfc, pocctrl);
652 spin_unlock_irqrestore(&pfc->lock, flags);
670 struct sh_pfc *pfc = pmx->pfc;
678 if (!sh_pfc_pinconf_validate(pfc, _pin, param))
685 if (!pfc->info->ops || !pfc->info->ops->set_bias)
688 spin_lock_irqsave(&pfc->lock, flags);
689 pfc->info->ops->set_bias(pfc, _pin, param);
690 spin_unlock_irqrestore(&pfc->lock, flags);
699 ret = sh_pfc_pinconf_set_drive_strength(pfc, _pin, arg);
711 if (!pfc->info->ops || !pfc->info->ops->pin_to_pocctrl)
714 bit = pfc->info->ops->pin_to_pocctrl(pfc, _pin, &pocctrl);
721 spin_lock_irqsave(&pfc->lock, flags);
722 val = sh_pfc_read(pfc, pocctrl);
727 sh_pfc_write(pfc, pocctrl, val);
728 spin_unlock_irqrestore(&pfc->lock, flags);
750 pins = pmx->pfc->info->groups[group].pins;
751 num_pins = pmx->pfc->info->groups[group].nr_pins;
771 static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
776 pmx->pins = devm_kcalloc(pfc->dev,
777 pfc->info->nr_pins, sizeof(*pmx->pins),
782 pmx->configs = devm_kcalloc(pfc->dev,
783 pfc->info->nr_pins, sizeof(*pmx->configs),
788 for (i = 0; i < pfc->info->nr_pins; ++i) {
789 const struct sh_pfc_pin *info = &pfc->info->pins[i];
800 int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
805 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
809 pmx->pfc = pfc;
811 ret = sh_pfc_map_pins(pfc, pmx);
821 pmx->pctl_desc.npins = pfc->info->nr_pins;
823 ret = devm_pinctrl_register_and_init(pfc->dev, &pmx->pctl_desc, pmx,
826 dev_err(pfc->dev, "could not register: %i\n", ret);