Lines Matching refs:port
47 #define RZA1_ADDR(mem, reg, port) ((mem) + (reg) + ((port) * 4))
88 * Each struct rza1_bidir_entry describes a port.
100 u16 port: 4;
259 { .port = 2, .pin = 7, .func = 4, .input = 0 },
260 { .port = 2, .pin = 11, .func = 4, .input = 0 },
261 { .port = 3, .pin = 7, .func = 3, .input = 0 },
262 { .port = 3, .pin = 7, .func = 8, .input = 0 },
263 { .port = 4, .pin = 7, .func = 5, .input = 0 },
264 { .port = 4, .pin = 7, .func = 11, .input = 0 },
265 { .port = 4, .pin = 15, .func = 6, .input = 0 },
266 { .port = 5, .pin = 0, .func = 1, .input = 1 },
267 { .port = 5, .pin = 1, .func = 1, .input = 1 },
268 { .port = 5, .pin = 2, .func = 1, .input = 1 },
269 { .port = 5, .pin = 3, .func = 1, .input = 1 },
270 { .port = 5, .pin = 4, .func = 1, .input = 1 },
271 { .port = 5, .pin = 5, .func = 1, .input = 1 },
272 { .port = 5, .pin = 6, .func = 1, .input = 1 },
273 { .port = 5, .pin = 7, .func = 1, .input = 1 },
274 { .port = 7, .pin = 4, .func = 6, .input = 0 },
275 { .port = 7, .pin = 11, .func = 2, .input = 0 },
276 { .port = 8, .pin = 10, .func = 8, .input = 0 },
277 { .port = 10, .pin = 15, .func = 2, .input = 0 },
402 { .port = 2, .pin = 8, .func = 2, .input = 0 },
403 { .port = 5, .pin = 6, .func = 3, .input = 0 },
404 { .port = 6, .pin = 6, .func = 3, .input = 0 },
405 { .port = 6, .pin = 10, .func = 3, .input = 0 },
406 { .port = 7, .pin = 10, .func = 2, .input = 0 },
407 { .port = 8, .pin = 2, .func = 3, .input = 0 },
437 * @port: the port where pin sits on
445 u8 port;
453 * struct rza1_port - describes a pin port
458 * @id: port number
460 * @pins: pins sitting on this port
502 static inline bool rza1_pinmux_get_bidir(unsigned int port,
507 const struct rza1_bidir_entry *entry = &table[port];
520 static inline int rza1_pinmux_get_swio(unsigned int port,
531 if (swio_pin->port == port && swio_pin->pin == pin &&
542 static unsigned int rza1_pinmux_get_flags(unsigned int port, unsigned int pin,
553 if (rza1_pinmux_get_bidir(port, pin, func, bidir_entries))
556 ret = rza1_pinmux_get_swio(port, pin, func, swio_entries);
573 static inline void rza1_set_bit(struct rza1_port *port, unsigned int reg,
576 void __iomem *mem = RZA1_ADDR(port->base, reg, port->id);
587 static inline unsigned int rza1_get_bit(struct rza1_port *port,
590 void __iomem *mem = RZA1_ADDR(port->base, reg, port->id);
599 * and configure it as input port.
603 * @port: port where pin sits on
606 static void rza1_pin_reset(struct rza1_port *port, unsigned int pin)
610 spin_lock_irqsave(&port->lock, irqflags);
611 rza1_set_bit(port, RZA1_PIBC_REG, pin, 0);
612 rza1_set_bit(port, RZA1_PBDC_REG, pin, 0);
614 rza1_set_bit(port, RZA1_PM_REG, pin, 1);
615 rza1_set_bit(port, RZA1_PMC_REG, pin, 0);
616 rza1_set_bit(port, RZA1_PIPC_REG, pin, 0);
617 spin_unlock_irqrestore(&port->lock, irqflags);
621 * rza1_pin_set_direction() - set I/O direction on a pin in port mode
623 * When running in output port mode keep PBDC enabled to allow reading the
626 * @port: port where pin sits on
630 static inline void rza1_pin_set_direction(struct rza1_port *port,
635 spin_lock_irqsave(&port->lock, irqflags);
637 rza1_set_bit(port, RZA1_PIBC_REG, pin, 1);
639 rza1_set_bit(port, RZA1_PM_REG, pin, 1);
640 rza1_set_bit(port, RZA1_PBDC_REG, pin, 0);
642 rza1_set_bit(port, RZA1_PM_REG, pin, 0);
643 rza1_set_bit(port, RZA1_PBDC_REG, pin, 1);
646 spin_unlock_irqrestore(&port->lock, irqflags);
649 static inline void rza1_pin_set(struct rza1_port *port, unsigned int pin,
654 spin_lock_irqsave(&port->lock, irqflags);
655 rza1_set_bit(port, RZA1_P_REG, pin, !!value);
656 spin_unlock_irqrestore(&port->lock, irqflags);
659 static inline int rza1_pin_get(struct rza1_port *port, unsigned int pin)
661 return rza1_get_bit(port, RZA1_PPR_REG, pin);
673 struct rza1_port *port = &rza1_pctl->ports[mux_conf->port];
679 rza1_pin_reset(port, pin);
682 mux_flags_from_table = rza1_pinmux_get_flags(port->id, pin, mux_func,
690 rza1_set_bit(port, RZA1_PBDC_REG, pin, 1);
715 rza1_set_bit(port, RZA1_PFC_REG, pin, mux_func & MUX_FUNC_PFC_MASK);
716 rza1_set_bit(port, RZA1_PFCE_REG, pin, mux_func & MUX_FUNC_PFCE_MASK);
717 rza1_set_bit(port, RZA1_PFCEA_REG, pin, mux_func & MUX_FUNC_PFCEA_MASK);
726 rza1_set_bit(port, RZA1_PM_REG, pin,
729 rza1_set_bit(port, RZA1_PIPC_REG, pin, 1);
731 rza1_set_bit(port, RZA1_PMC_REG, pin, 1);
741 * rza1_gpio_request() - configure pin in port mode
743 * Configure a pin as gpio (port mode).
752 struct rza1_port *port = gpiochip_get_data(chip);
754 rza1_pin_reset(port, gpio);
763 * Reset pin to port mode, with input buffer disabled. This overwrites all
764 * port direction settings applied with set_direction
771 struct rza1_port *port = gpiochip_get_data(chip);
773 rza1_pin_reset(port, gpio);
778 struct rza1_port *port = gpiochip_get_data(chip);
780 if (rza1_get_bit(port, RZA1_PM_REG, gpio))
789 struct rza1_port *port = gpiochip_get_data(chip);
791 rza1_pin_set_direction(port, gpio, true);
800 struct rza1_port *port = gpiochip_get_data(chip);
803 rza1_pin_set(port, gpio, value);
804 rza1_pin_set_direction(port, gpio, false);
821 struct rza1_port *port = gpiochip_get_data(chip);
823 return rza1_pin_get(port, gpio);
829 struct rza1_port *port = gpiochip_get_data(chip);
831 rza1_pin_set(port, gpio, value);
951 mux_conf->port = RZA1_PIN_ID_TO_PORT(mux_conf->id);
956 if (mux_conf->port >= RZA1_NPORTS ||
959 "Wrong port %u pin %u for %s property\n",
960 mux_conf->port, mux_conf->pin, prop_name);
1201 * Find out on which port this gpio-chip maps to by inspecting the
1317 unsigned int port = RZA1_PIN_ID_TO_PORT(i);
1321 "P%u-%u", port, pin);
1328 * they provide per-port lock and logical base address.