Lines Matching refs:state

132  * @is_enabled: Set to false when GPIO should be put in high Z state.
215 static int pmic_gpio_read(struct pmic_gpio_state *state,
221 ret = regmap_read(state->map, pad->base + addr, &val);
223 dev_err(state->dev, "read 0x%x failed\n", addr);
230 static int pmic_gpio_write(struct pmic_gpio_state *state,
236 ret = regmap_write(state->map, pad->base + addr, val);
238 dev_err(state->dev, "write 0x%x failed\n", addr);
295 struct pmic_gpio_state *state = pinctrl_dev_get_drvdata(pctldev);
333 ret = pmic_gpio_write(state, pad,
339 ret = pmic_gpio_write(state, pad,
348 ret = pmic_gpio_write(state, pad,
357 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_MODE_CTL, val);
364 return pmic_gpio_write(state, pad, PMIC_GPIO_REG_EN_CTL, val);
456 struct pmic_gpio_state *state = pinctrl_dev_get_drvdata(pctldev);
542 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_VIN_CTL, val);
548 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_PULL_CTL, val);
555 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL, val);
569 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_IN_CTL, val);
583 ret = pmic_gpio_write(state, pad,
589 ret = pmic_gpio_write(state, pad,
598 ret = pmic_gpio_write(state, pad,
607 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_MODE_CTL, val);
614 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_EN_CTL, val);
622 struct pmic_gpio_state *state = pinctrl_dev_get_drvdata(pctldev);
641 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_EN_CTL);
647 ret = pmic_gpio_read(state, pad, PMIC_MPP_REG_RT_STS);
689 struct pmic_gpio_state *state = gpiochip_get_data(chip);
694 return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
700 struct pmic_gpio_state *state = gpiochip_get_data(chip);
705 return pmic_gpio_config_set(state->ctrl, pin, &config, 1);
710 struct pmic_gpio_state *state = gpiochip_get_data(chip);
714 pad = state->ctrl->desc->pins[pin].drv_data;
720 ret = pmic_gpio_read(state, pad, PMIC_MPP_REG_RT_STS);
732 struct pmic_gpio_state *state = gpiochip_get_data(chip);
737 pmic_gpio_config_set(state->ctrl, pin, &config, 1);
755 struct pmic_gpio_state *state = gpiochip_get_data(chip);
759 pmic_gpio_config_dbg_show(state->ctrl, s, i);
775 static int pmic_gpio_populate(struct pmic_gpio_state *state,
780 type = pmic_gpio_read(state, pad, PMIC_GPIO_REG_TYPE);
785 dev_err(state->dev, "incorrect block type 0x%x at 0x%x\n",
790 subtype = pmic_gpio_read(state, pad, PMIC_GPIO_REG_SUBTYPE);
818 dev_err(state->dev, "unknown GPIO type 0x%x\n", subtype);
823 val = pmic_gpio_read(state, pad,
831 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_MODE_CTL);
837 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_MODE_CTL);
868 dev_err(state->dev, "unknown GPIO direction\n");
872 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_VIN_CTL);
879 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_PULL_CTL);
886 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_IN_CTL);
898 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL);
909 val = pmic_gpio_read(state, pad,
926 struct pmic_gpio_state *state = container_of(domain->host_data,
931 fwspec->param[0] < 1 || fwspec->param[0] > state->chip.ngpio)
966 struct pmic_gpio_state *state;
979 state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL);
980 if (!state)
983 platform_set_drvdata(pdev, state);
985 state->dev = &pdev->dev;
986 state->map = dev_get_regmap(dev->parent, NULL);
1021 ret = pmic_gpio_populate(state, pad);
1026 state->chip = pmic_gpio_gpio_template;
1027 state->chip.parent = dev;
1028 state->chip.base = -1;
1029 state->chip.ngpio = npins;
1030 state->chip.label = dev_name(dev);
1031 state->chip.of_gpio_n_cells = 2;
1032 state->chip.can_sleep = false;
1034 state->ctrl = devm_pinctrl_register(dev, pctrldesc, state);
1035 if (IS_ERR(state->ctrl))
1036 return PTR_ERR(state->ctrl);
1038 parent_node = of_irq_find_parent(state->dev->of_node);
1047 state->irq.name = "spmi-gpio",
1048 state->irq.irq_ack = irq_chip_ack_parent,
1049 state->irq.irq_mask = irq_chip_mask_parent,
1050 state->irq.irq_unmask = irq_chip_unmask_parent,
1051 state->irq.irq_set_type = irq_chip_set_type_parent,
1052 state->irq.irq_set_wake = irq_chip_set_wake_parent,
1053 state->irq.flags = IRQCHIP_MASK_ON_SUSPEND,
1055 girq = &state->chip.irq;
1056 girq->chip = &state->irq;
1059 girq->fwnode = of_node_to_fwnode(state->dev->of_node);
1066 ret = gpiochip_add_data(&state->chip, state);
1068 dev_err(state->dev, "can't add gpio chip\n");
1083 ret = gpiochip_add_pin_range(&state->chip, dev_name(dev), 0, 0,
1094 gpiochip_remove(&state->chip);
1100 struct pmic_gpio_state *state = platform_get_drvdata(pdev);
1102 gpiochip_remove(&state->chip);