Lines Matching refs:pad
216 struct pmic_gpio_pad *pad, unsigned int addr)
221 ret = regmap_read(state->map, pad->base + addr, &val);
231 struct pmic_gpio_pad *pad, unsigned int addr,
236 ret = regmap_write(state->map, pad->base + addr, val);
296 struct pmic_gpio_pad *pad;
305 pad = pctldev->desc->pins[pin].drv_data;
310 if (!pad->lv_mv_type) {
321 pad->function = function;
323 if (pad->analog_pass)
325 else if (pad->output_enabled && pad->input_enabled)
327 else if (pad->output_enabled)
332 if (pad->lv_mv_type) {
333 ret = pmic_gpio_write(state, pad,
338 val = pad->atest - 1;
339 ret = pmic_gpio_write(state, pad,
344 val = pad->out_value
346 val |= pad->function
348 ret = pmic_gpio_write(state, pad,
354 val |= pad->function << PMIC_GPIO_REG_MODE_FUNCTION_SHIFT;
355 val |= pad->out_value & PMIC_GPIO_REG_MODE_VALUE_SHIFT;
357 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_MODE_CTL, val);
362 val = pad->is_enabled << PMIC_GPIO_REG_MASTER_EN_SHIFT;
364 return pmic_gpio_write(state, pad, PMIC_GPIO_REG_EN_CTL, val);
378 struct pmic_gpio_pad *pad;
381 pad = pctldev->desc->pins[pin].drv_data;
385 if (pad->buffer_type != PMIC_GPIO_OUT_BUF_CMOS)
390 if (pad->buffer_type != PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS)
395 if (pad->buffer_type != PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS)
400 if (pad->pullup != PMIC_GPIO_PULL_DOWN)
405 if (pad->pullup != PMIC_GPIO_PULL_DISABLE)
410 if (pad->pullup != PMIC_GPIO_PULL_UP_30)
415 if (pad->is_enabled)
420 arg = pad->power_source;
423 if (!pad->input_enabled)
428 arg = pad->out_value;
431 arg = pad->pullup;
434 arg = pad->strength;
437 arg = pad->atest;
440 arg = pad->analog_pass;
443 arg = pad->dtest_buffer;
457 struct pmic_gpio_pad *pad;
462 pad = pctldev->desc->pins[pin].drv_data;
464 pad->is_enabled = true;
471 pad->buffer_type = PMIC_GPIO_OUT_BUF_CMOS;
474 if (!pad->have_buffer)
476 pad->buffer_type = PMIC_GPIO_OUT_BUF_OPEN_DRAIN_NMOS;
479 if (!pad->have_buffer)
481 pad->buffer_type = PMIC_GPIO_OUT_BUF_OPEN_DRAIN_PMOS;
484 pad->pullup = PMIC_GPIO_PULL_DISABLE;
487 pad->pullup = PMIC_GPIO_PULL_UP_30;
491 pad->pullup = PMIC_GPIO_PULL_DOWN;
493 pad->pullup = PMIC_GPIO_PULL_DISABLE;
496 pad->is_enabled = false;
499 if (arg >= pad->num_sources)
501 pad->power_source = arg;
504 pad->input_enabled = arg ? true : false;
507 pad->output_enabled = true;
508 pad->out_value = arg;
513 pad->pullup = arg;
518 pad->strength = arg;
521 if (!pad->lv_mv_type || arg > 4)
523 pad->atest = arg;
526 if (!pad->lv_mv_type)
528 pad->analog_pass = true;
533 pad->dtest_buffer = arg;
540 val = pad->power_source << PMIC_GPIO_REG_VIN_SHIFT;
542 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_VIN_CTL, val);
546 val = pad->pullup << PMIC_GPIO_REG_PULL_SHIFT;
548 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_PULL_CTL, val);
552 val = pad->buffer_type << PMIC_GPIO_REG_OUT_TYPE_SHIFT;
553 val |= pad->strength << PMIC_GPIO_REG_OUT_STRENGTH_SHIFT;
555 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL, val);
559 if (pad->dtest_buffer == 0) {
562 if (pad->lv_mv_type) {
563 val = pad->dtest_buffer - 1;
566 val = BIT(pad->dtest_buffer - 1);
569 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_DIG_IN_CTL, val);
573 if (pad->analog_pass)
575 else if (pad->output_enabled && pad->input_enabled)
577 else if (pad->output_enabled)
582 if (pad->lv_mv_type) {
583 ret = pmic_gpio_write(state, pad,
588 val = pad->atest - 1;
589 ret = pmic_gpio_write(state, pad,
594 val = pad->out_value
596 val |= pad->function
598 ret = pmic_gpio_write(state, pad,
604 val |= pad->function << PMIC_GPIO_REG_MODE_FUNCTION_SHIFT;
605 val |= pad->out_value & PMIC_GPIO_REG_MODE_VALUE_SHIFT;
607 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_MODE_CTL, val);
612 val = pad->is_enabled << PMIC_GPIO_REG_MASTER_EN_SHIFT;
614 ret = pmic_gpio_write(state, pad, PMIC_GPIO_REG_EN_CTL, val);
623 struct pmic_gpio_pad *pad;
637 pad = pctldev->desc->pins[pin].drv_data;
641 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_EN_CTL);
646 if (pad->input_enabled) {
647 ret = pmic_gpio_read(state, pad, PMIC_MPP_REG_RT_STS);
652 pad->out_value = ret;
658 function = pad->function;
659 if (!pad->lv_mv_type &&
660 pad->function >= PMIC_GPIO_FUNC_INDEX_FUNC3)
664 if (pad->analog_pass)
668 pad->output_enabled ? "out" : "in");
669 seq_printf(s, " %-4s", pad->out_value ? "high" : "low");
671 seq_printf(s, " vin-%d", pad->power_source);
672 seq_printf(s, " %-27s", biases[pad->pullup]);
673 seq_printf(s, " %-10s", buffer_types[pad->buffer_type]);
674 seq_printf(s, " %-7s", strengths[pad->strength]);
675 seq_printf(s, " atest-%d", pad->atest);
676 seq_printf(s, " dtest-%d", pad->dtest_buffer);
711 struct pmic_gpio_pad *pad;
714 pad = state->ctrl->desc->pins[pin].drv_data;
716 if (!pad->is_enabled)
719 if (pad->input_enabled) {
720 ret = pmic_gpio_read(state, pad, PMIC_MPP_REG_RT_STS);
724 pad->out_value = ret & PMIC_MPP_REG_RT_STS_VAL_MASK;
727 return !!pad->out_value;
776 struct pmic_gpio_pad *pad)
780 type = pmic_gpio_read(state, pad, PMIC_GPIO_REG_TYPE);
786 type, pad->base);
790 subtype = pmic_gpio_read(state, pad, PMIC_GPIO_REG_SUBTYPE);
796 pad->have_buffer = true;
799 pad->num_sources = 4;
802 pad->have_buffer = true;
805 pad->num_sources = 8;
808 pad->num_sources = 1;
809 pad->have_buffer = true;
810 pad->lv_mv_type = true;
813 pad->num_sources = 2;
814 pad->have_buffer = true;
815 pad->lv_mv_type = true;
822 if (pad->lv_mv_type) {
823 val = pmic_gpio_read(state, pad,
828 pad->out_value = !!(val & PMIC_GPIO_LV_MV_OUTPUT_INVERT);
829 pad->function = val & PMIC_GPIO_LV_MV_OUTPUT_SOURCE_SEL_MASK;
831 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_MODE_CTL);
837 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_MODE_CTL);
841 pad->out_value = val & PMIC_GPIO_REG_MODE_VALUE_SHIFT;
845 pad->function = val >> PMIC_GPIO_REG_MODE_FUNCTION_SHIFT;
846 pad->function &= PMIC_GPIO_REG_MODE_FUNCTION_MASK;
851 pad->input_enabled = true;
852 pad->output_enabled = false;
855 pad->input_enabled = false;
856 pad->output_enabled = true;
859 pad->input_enabled = true;
860 pad->output_enabled = true;
863 if (!pad->lv_mv_type)
865 pad->analog_pass = true;
872 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_VIN_CTL);
876 pad->power_source = val >> PMIC_GPIO_REG_VIN_SHIFT;
877 pad->power_source &= PMIC_GPIO_REG_VIN_MASK;
879 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_PULL_CTL);
883 pad->pullup = val >> PMIC_GPIO_REG_PULL_SHIFT;
884 pad->pullup &= PMIC_GPIO_REG_PULL_MASK;
886 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_IN_CTL);
890 if (pad->lv_mv_type && (val & PMIC_GPIO_LV_MV_DIG_IN_DTEST_EN))
891 pad->dtest_buffer =
893 else if (!pad->lv_mv_type)
894 pad->dtest_buffer = ffs(val);
896 pad->dtest_buffer = 0;
898 val = pmic_gpio_read(state, pad, PMIC_GPIO_REG_DIG_OUT_CTL);
902 pad->strength = val >> PMIC_GPIO_REG_OUT_STRENGTH_SHIFT;
903 pad->strength &= PMIC_GPIO_REG_OUT_STRENGTH_MASK;
905 pad->buffer_type = val >> PMIC_GPIO_REG_OUT_TYPE_SHIFT;
906 pad->buffer_type &= PMIC_GPIO_REG_OUT_TYPE_MASK;
908 if (pad->lv_mv_type) {
909 val = pmic_gpio_read(state, pad,
913 pad->atest = (val & PMIC_GPIO_LV_MV_ANA_MUX_SEL_MASK) + 1;
917 pad->is_enabled = true;
965 struct pmic_gpio_pad *pad, *pads;
1014 pad = &pads[i];
1015 pindesc->drv_data = pad;
1019 pad->base = reg + i * PMIC_GPIO_ADDRESS_RANGE;
1021 ret = pmic_gpio_populate(state, pad);