Lines Matching defs:GRP_MUX
75 #define GRP_MUX(a, m, p) \
239 GRP_MUX("exin0", EXIN, pins_exin0),
240 GRP_MUX("exin1", EXIN, pins_exin1),
241 GRP_MUX("exin2", EXIN, pins_exin2),
242 GRP_MUX("jtag", JTAG, pins_jtag),
243 GRP_MUX("ebu a23", EBU, pins_ebu_a23),
244 GRP_MUX("ebu a24", EBU, pins_ebu_a24),
245 GRP_MUX("ebu a25", EBU, pins_ebu_a25),
246 GRP_MUX("ebu clk", EBU, pins_ebu_clk),
247 GRP_MUX("ebu cs1", EBU, pins_ebu_cs1),
248 GRP_MUX("ebu wait", EBU, pins_ebu_wait),
249 GRP_MUX("nand ale", EBU, pins_nand_ale),
250 GRP_MUX("nand cs1", EBU, pins_nand_cs1),
251 GRP_MUX("nand cle", EBU, pins_nand_cle),
252 GRP_MUX("spi", SPI, pins_spi),
253 GRP_MUX("spi_cs1", SPI, pins_spi_cs1),
254 GRP_MUX("spi_cs2", SPI, pins_spi_cs2),
255 GRP_MUX("spi_cs3", SPI, pins_spi_cs3),
256 GRP_MUX("spi_cs4", SPI, pins_spi_cs4),
257 GRP_MUX("spi_cs5", SPI, pins_spi_cs5),
258 GRP_MUX("spi_cs6", SPI, pins_spi_cs6),
259 GRP_MUX("asc0", ASC, pins_asc0),
260 GRP_MUX("asc0 cts rts", ASC, pins_asc0_cts_rts),
261 GRP_MUX("stp", STP, pins_stp),
262 GRP_MUX("nmi", NMI, pins_nmi),
263 GRP_MUX("gpt1", GPT, pins_gpt1),
264 GRP_MUX("gpt2", GPT, pins_gpt2),
265 GRP_MUX("gpt3", GPT, pins_gpt3),
266 GRP_MUX("clkout0", CGU, pins_clkout0),
267 GRP_MUX("clkout1", CGU, pins_clkout1),
268 GRP_MUX("clkout2", CGU, pins_clkout2),
269 GRP_MUX("clkout3", CGU, pins_clkout3),
270 GRP_MUX("gnt1", PCI, pins_pci_gnt1),
271 GRP_MUX("gnt2", PCI, pins_pci_gnt2),
272 GRP_MUX("gnt3", PCI, pins_pci_gnt3),
273 GRP_MUX("req1", PCI, pins_pci_req1),
274 GRP_MUX("req2", PCI, pins_pci_req2),
275 GRP_MUX("req3", PCI, pins_pci_req3),
277 GRP_MUX("nand rdy", EBU, pins_nand_rdy),
278 GRP_MUX("nand rd", EBU, pins_nand_rd),
279 GRP_MUX("exin3", EXIN, pins_exin3),
280 GRP_MUX("exin4", EXIN, pins_exin4),
281 GRP_MUX("exin5", EXIN, pins_exin5),
282 GRP_MUX("gnt4", PCI, pins_pci_gnt4),
283 GRP_MUX("req4", PCI, pins_pci_gnt4),
284 GRP_MUX("mdio", MDIO, pins_mdio),
285 GRP_MUX("gphy0 led0", GPHY, pins_gphy0_led0),
286 GRP_MUX("gphy0 led1", GPHY, pins_gphy0_led1),
287 GRP_MUX("gphy0 led2", GPHY, pins_gphy0_led2),
288 GRP_MUX("gphy1 led0", GPHY, pins_gphy1_led0),
289 GRP_MUX("gphy1 led1", GPHY, pins_gphy1_led1),
290 GRP_MUX("gphy1 led2", GPHY, pins_gphy1_led2),
419 GRP_MUX("exin0", EXIN, ase_pins_exin0),
420 GRP_MUX("exin1", EXIN, ase_pins_exin1),
421 GRP_MUX("exin2", EXIN, ase_pins_exin2),
422 GRP_MUX("jtag", JTAG, ase_pins_jtag),
423 GRP_MUX("spi", SPI, ase_pins_spi), /* DEPRECATED */
424 GRP_MUX("spi_di", SPI, ase_pins_spi_di),
425 GRP_MUX("spi_do", SPI, ase_pins_spi_do),
426 GRP_MUX("spi_clk", SPI, ase_pins_spi_clk),
427 GRP_MUX("spi_cs1", SPI, ase_pins_spi_cs1),
428 GRP_MUX("spi_cs2", SPI, ase_pins_spi_cs2),
429 GRP_MUX("spi_cs3", SPI, ase_pins_spi_cs3),
430 GRP_MUX("asc", ASC, ase_pins_asc),
431 GRP_MUX("stp", STP, ase_pins_stp),
432 GRP_MUX("gpt1", GPT, ase_pins_gpt1),
433 GRP_MUX("gpt2", GPT, ase_pins_gpt2),
434 GRP_MUX("gpt3", GPT, ase_pins_gpt3),
435 GRP_MUX("clkout0", CGU, ase_pins_clkout0),
436 GRP_MUX("clkout1", CGU, ase_pins_clkout1),
437 GRP_MUX("clkout2", CGU, ase_pins_clkout2),
438 GRP_MUX("mdio", MDIO, ase_pins_mdio),
439 GRP_MUX("dfe led0", DFE, ase_pins_dfe_led0),
440 GRP_MUX("dfe led1", DFE, ase_pins_dfe_led1),
441 GRP_MUX("ephy led0", EPHY, ase_pins_ephy_led0),
442 GRP_MUX("ephy led1", EPHY, ase_pins_ephy_led1),
443 GRP_MUX("ephy led2", EPHY, ase_pins_ephy_led2),
568 GRP_MUX("exin0", EXIN, danube_pins_exin0),
569 GRP_MUX("exin1", EXIN, danube_pins_exin1),
570 GRP_MUX("exin2", EXIN, danube_pins_exin2),
571 GRP_MUX("jtag", JTAG, danube_pins_jtag),
572 GRP_MUX("ebu a23", EBU, danube_pins_ebu_a23),
573 GRP_MUX("ebu a24", EBU, danube_pins_ebu_a24),
574 GRP_MUX("ebu a25", EBU, danube_pins_ebu_a25),
575 GRP_MUX("ebu clk", EBU, danube_pins_ebu_clk),
576 GRP_MUX("ebu cs1", EBU, danube_pins_ebu_cs1),
577 GRP_MUX("ebu wait", EBU, danube_pins_ebu_wait),
578 GRP_MUX("nand ale", EBU, danube_pins_nand_ale),
579 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1),
580 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
581 GRP_MUX("spi", SPI, danube_pins_spi), /* DEPRECATED */
582 GRP_MUX("spi_di", SPI, danube_pins_spi_di),
583 GRP_MUX("spi_do", SPI, danube_pins_spi_do),
584 GRP_MUX("spi_clk", SPI, danube_pins_spi_clk),
585 GRP_MUX("spi_cs1", SPI, danube_pins_spi_cs1),
586 GRP_MUX("spi_cs2", SPI, danube_pins_spi_cs2),
587 GRP_MUX("spi_cs3", SPI, danube_pins_spi_cs3),
588 GRP_MUX("spi_cs4", SPI, danube_pins_spi_cs4),
589 GRP_MUX("spi_cs5", SPI, danube_pins_spi_cs5),
590 GRP_MUX("spi_cs6", SPI, danube_pins_spi_cs6),
591 GRP_MUX("asc0", ASC, danube_pins_asc0),
592 GRP_MUX("asc0 cts rts", ASC, danube_pins_asc0_cts_rts),
593 GRP_MUX("stp", STP, danube_pins_stp),
594 GRP_MUX("nmi", NMI, danube_pins_nmi),
595 GRP_MUX("gpt1", GPT, danube_pins_gpt1),
596 GRP_MUX("gpt2", GPT, danube_pins_gpt2),
597 GRP_MUX("gpt3", GPT, danube_pins_gpt3),
598 GRP_MUX("clkout0", CGU, danube_pins_clkout0),
599 GRP_MUX("clkout1", CGU, danube_pins_clkout1),
600 GRP_MUX("clkout2", CGU, danube_pins_clkout2),
601 GRP_MUX("clkout3", CGU, danube_pins_clkout3),
602 GRP_MUX("gnt1", PCI, danube_pins_pci_gnt1),
603 GRP_MUX("gnt2", PCI, danube_pins_pci_gnt2),
604 GRP_MUX("gnt3", PCI, danube_pins_pci_gnt3),
605 GRP_MUX("req1", PCI, danube_pins_pci_req1),
606 GRP_MUX("req2", PCI, danube_pins_pci_req2),
607 GRP_MUX("req3", PCI, danube_pins_pci_req3),
608 GRP_MUX("dfe led0", DFE, danube_pins_dfe_led0),
609 GRP_MUX("dfe led1", DFE, danube_pins_dfe_led1),
773 GRP_MUX("exin0", EXIN, xrx100_pins_exin0),
774 GRP_MUX("exin1", EXIN, xrx100_pins_exin1),
775 GRP_MUX("exin2", EXIN, xrx100_pins_exin2),
776 GRP_MUX("exin3", EXIN, xrx100_pins_exin3),
777 GRP_MUX("exin4", EXIN, xrx100_pins_exin4),
778 GRP_MUX("exin5", EXIN, xrx100_pins_exin5),
779 GRP_MUX("ebu a23", EBU, xrx100_pins_ebu_a23),
780 GRP_MUX("ebu a24", EBU, xrx100_pins_ebu_a24),
781 GRP_MUX("ebu a25", EBU, xrx100_pins_ebu_a25),
782 GRP_MUX("ebu clk", EBU, xrx100_pins_ebu_clk),
783 GRP_MUX("ebu cs1", EBU, xrx100_pins_ebu_cs1),
784 GRP_MUX("ebu wait", EBU, xrx100_pins_ebu_wait),
785 GRP_MUX("nand ale", EBU, xrx100_pins_nand_ale),
786 GRP_MUX("nand cs1", EBU, xrx100_pins_nand_cs1),
787 GRP_MUX("nand cle", EBU, xrx100_pins_nand_cle),
788 GRP_MUX("nand rdy", EBU, xrx100_pins_nand_rdy),
789 GRP_MUX("nand rd", EBU, xrx100_pins_nand_rd),
790 GRP_MUX("spi_di", SPI, xrx100_pins_spi_di),
791 GRP_MUX("spi_do", SPI, xrx100_pins_spi_do),
792 GRP_MUX("spi_clk", SPI, xrx100_pins_spi_clk),
793 GRP_MUX("spi_cs1", SPI, xrx100_pins_spi_cs1),
794 GRP_MUX("spi_cs2", SPI, xrx100_pins_spi_cs2),
795 GRP_MUX("spi_cs3", SPI, xrx100_pins_spi_cs3),
796 GRP_MUX("spi_cs4", SPI, xrx100_pins_spi_cs4),
797 GRP_MUX("spi_cs5", SPI, xrx100_pins_spi_cs5),
798 GRP_MUX("spi_cs6", SPI, xrx100_pins_spi_cs6),
799 GRP_MUX("asc0", ASC, xrx100_pins_asc0),
800 GRP_MUX("asc0 cts rts", ASC, xrx100_pins_asc0_cts_rts),
801 GRP_MUX("stp", STP, xrx100_pins_stp),
802 GRP_MUX("nmi", NMI, xrx100_pins_nmi),
803 GRP_MUX("gpt1", GPT, xrx100_pins_gpt1),
804 GRP_MUX("gpt2", GPT, xrx100_pins_gpt2),
805 GRP_MUX("gpt3", GPT, xrx100_pins_gpt3),
806 GRP_MUX("clkout0", CGU, xrx100_pins_clkout0),
807 GRP_MUX("clkout1", CGU, xrx100_pins_clkout1),
808 GRP_MUX("clkout2", CGU, xrx100_pins_clkout2),
809 GRP_MUX("clkout3", CGU, xrx100_pins_clkout3),
810 GRP_MUX("gnt1", PCI, xrx100_pins_pci_gnt1),
811 GRP_MUX("gnt2", PCI, xrx100_pins_pci_gnt2),
812 GRP_MUX("gnt3", PCI, xrx100_pins_pci_gnt3),
813 GRP_MUX("gnt4", PCI, xrx100_pins_pci_gnt4),
814 GRP_MUX("req1", PCI, xrx100_pins_pci_req1),
815 GRP_MUX("req2", PCI, xrx100_pins_pci_req2),
816 GRP_MUX("req3", PCI, xrx100_pins_pci_req3),
817 GRP_MUX("req4", PCI, xrx100_pins_pci_req4),
818 GRP_MUX("mdio", MDIO, xrx100_pins_mdio),
819 GRP_MUX("dfe led0", DFE, xrx100_pins_dfe_led0),
820 GRP_MUX("dfe led1", DFE, xrx100_pins_dfe_led1),
1001 GRP_MUX("exin0", EXIN, xrx200_pins_exin0),
1002 GRP_MUX("exin1", EXIN, xrx200_pins_exin1),
1003 GRP_MUX("exin2", EXIN, xrx200_pins_exin2),
1004 GRP_MUX("exin3", EXIN, xrx200_pins_exin3),
1005 GRP_MUX("exin4", EXIN, xrx200_pins_exin4),
1006 GRP_MUX("exin5", EXIN, xrx200_pins_exin5),
1007 GRP_MUX("ebu a23", EBU, xrx200_pins_ebu_a23),
1008 GRP_MUX("ebu a24", EBU, xrx200_pins_ebu_a24),
1009 GRP_MUX("ebu a25", EBU, xrx200_pins_ebu_a25),
1010 GRP_MUX("ebu clk", EBU, xrx200_pins_ebu_clk),
1011 GRP_MUX("ebu cs1", EBU, xrx200_pins_ebu_cs1),
1012 GRP_MUX("ebu wait", EBU, xrx200_pins_ebu_wait),
1013 GRP_MUX("nand ale", EBU, xrx200_pins_nand_ale),
1014 GRP_MUX("nand cs1", EBU, xrx200_pins_nand_cs1),
1015 GRP_MUX("nand cle", EBU, xrx200_pins_nand_cle),
1016 GRP_MUX("nand rdy", EBU, xrx200_pins_nand_rdy),
1017 GRP_MUX("nand rd", EBU, xrx200_pins_nand_rd),
1018 GRP_MUX("spi_di", SPI, xrx200_pins_spi_di),
1019 GRP_MUX("spi_do", SPI, xrx200_pins_spi_do),
1020 GRP_MUX("spi_clk", SPI, xrx200_pins_spi_clk),
1021 GRP_MUX("spi_cs1", SPI, xrx200_pins_spi_cs1),
1022 GRP_MUX("spi_cs2", SPI, xrx200_pins_spi_cs2),
1023 GRP_MUX("spi_cs3", SPI, xrx200_pins_spi_cs3),
1024 GRP_MUX("spi_cs4", SPI, xrx200_pins_spi_cs4),
1025 GRP_MUX("spi_cs5", SPI, xrx200_pins_spi_cs5),
1026 GRP_MUX("spi_cs6", SPI, xrx200_pins_spi_cs6),
1027 GRP_MUX("usif uart_rx", USIF, xrx200_pins_usif_uart_rx),
1028 GRP_MUX("usif uart_tx", USIF, xrx200_pins_usif_uart_tx),
1029 GRP_MUX("usif uart_rts", USIF, xrx200_pins_usif_uart_rts),
1030 GRP_MUX("usif uart_cts", USIF, xrx200_pins_usif_uart_cts),
1031 GRP_MUX("usif uart_dtr", USIF, xrx200_pins_usif_uart_dtr),
1032 GRP_MUX("usif uart_dsr", USIF, xrx200_pins_usif_uart_dsr),
1033 GRP_MUX("usif uart_dcd", USIF, xrx200_pins_usif_uart_dcd),
1034 GRP_MUX("usif uart_ri", USIF, xrx200_pins_usif_uart_ri),
1035 GRP_MUX("usif spi_di", USIF, xrx200_pins_usif_spi_di),
1036 GRP_MUX("usif spi_do", USIF, xrx200_pins_usif_spi_do),
1037 GRP_MUX("usif spi_clk", USIF, xrx200_pins_usif_spi_clk),
1038 GRP_MUX("usif spi_cs0", USIF, xrx200_pins_usif_spi_cs0),
1039 GRP_MUX("usif spi_cs1", USIF, xrx200_pins_usif_spi_cs1),
1040 GRP_MUX("usif spi_cs2", USIF, xrx200_pins_usif_spi_cs2),
1041 GRP_MUX("stp", STP, xrx200_pins_stp),
1042 GRP_MUX("nmi", NMI, xrx200_pins_nmi),
1043 GRP_MUX("gpt1", GPT, xrx200_pins_gpt1),
1044 GRP_MUX("gpt2", GPT, xrx200_pins_gpt2),
1045 GRP_MUX("gpt3", GPT, xrx200_pins_gpt3),
1046 GRP_MUX("clkout0", CGU, xrx200_pins_clkout0),
1047 GRP_MUX("clkout1", CGU, xrx200_pins_clkout1),
1048 GRP_MUX("clkout2", CGU, xrx200_pins_clkout2),
1049 GRP_MUX("clkout3", CGU, xrx200_pins_clkout3),
1050 GRP_MUX("gnt1", PCI, xrx200_pins_pci_gnt1),
1051 GRP_MUX("gnt2", PCI, xrx200_pins_pci_gnt2),
1052 GRP_MUX("gnt3", PCI, xrx200_pins_pci_gnt3),
1053 GRP_MUX("gnt4", PCI, xrx200_pins_pci_gnt4),
1054 GRP_MUX("req1", PCI, xrx200_pins_pci_req1),
1055 GRP_MUX("req2", PCI, xrx200_pins_pci_req2),
1056 GRP_MUX("req3", PCI, xrx200_pins_pci_req3),
1057 GRP_MUX("req4", PCI, xrx200_pins_pci_req4),
1058 GRP_MUX("mdio", MDIO, xrx200_pins_mdio),
1059 GRP_MUX("dfe led0", DFE, xrx200_pins_dfe_led0),
1060 GRP_MUX("dfe led1", DFE, xrx200_pins_dfe_led1),
1061 GRP_MUX("gphy0 led0", GPHY, xrx200_pins_gphy0_led0),
1062 GRP_MUX("gphy0 led1", GPHY, xrx200_pins_gphy0_led1),
1063 GRP_MUX("gphy0 led2", GPHY, xrx200_pins_gphy0_led2),
1064 GRP_MUX("gphy1 led0", GPHY, xrx200_pins_gphy1_led0),
1065 GRP_MUX("gphy1 led1", GPHY, xrx200_pins_gphy1_led1),
1066 GRP_MUX("gphy1 led2", GPHY, xrx200_pins_gphy1_led2),
1251 GRP_MUX("exin0", EXIN, xrx300_pins_exin0),
1252 GRP_MUX("exin1", EXIN, xrx300_pins_exin1),
1253 GRP_MUX("exin2", EXIN, xrx300_pins_exin2),
1254 GRP_MUX("exin4", EXIN, xrx300_pins_exin4),
1255 GRP_MUX("exin5", EXIN, xrx300_pins_exin5),
1256 GRP_MUX("nand ale", EBU, xrx300_pins_nand_ale),
1257 GRP_MUX("nand cs1", EBU, xrx300_pins_nand_cs1),
1258 GRP_MUX("nand cle", EBU, xrx300_pins_nand_cle),
1259 GRP_MUX("nand rdy", EBU, xrx300_pins_nand_rdy),
1260 GRP_MUX("nand rd", EBU, xrx300_pins_nand_rd),
1261 GRP_MUX("nand d1", EBU, xrx300_pins_nand_d1),
1262 GRP_MUX("nand d0", EBU, xrx300_pins_nand_d0),
1263 GRP_MUX("nand d2", EBU, xrx300_pins_nand_d2),
1264 GRP_MUX("nand d7", EBU, xrx300_pins_nand_d7),
1265 GRP_MUX("nand d6", EBU, xrx300_pins_nand_d6),
1266 GRP_MUX("nand d5", EBU, xrx300_pins_nand_d5),
1267 GRP_MUX("nand d4", EBU, xrx300_pins_nand_d4),
1268 GRP_MUX("nand d3", EBU, xrx300_pins_nand_d3),
1269 GRP_MUX("nand cs0", EBU, xrx300_pins_nand_cs0),
1270 GRP_MUX("nand wr", EBU, xrx300_pins_nand_wr),
1271 GRP_MUX("nand wp", EBU, xrx300_pins_nand_wp),
1272 GRP_MUX("nand se", EBU, xrx300_pins_nand_se),
1273 GRP_MUX("spi_di", SPI, xrx300_pins_spi_di),
1274 GRP_MUX("spi_do", SPI, xrx300_pins_spi_do),
1275 GRP_MUX("spi_clk", SPI, xrx300_pins_spi_clk),
1276 GRP_MUX("spi_cs1", SPI, xrx300_pins_spi_cs1),
1277 GRP_MUX("spi_cs4", SPI, xrx300_pins_spi_cs4),
1278 GRP_MUX("spi_cs6", SPI, xrx300_pins_spi_cs6),
1279 GRP_MUX("usif uart_rx", USIF, xrx300_pins_usif_uart_rx),
1280 GRP_MUX("usif uart_tx", USIF, xrx300_pins_usif_uart_tx),
1281 GRP_MUX("usif spi_di", USIF, xrx300_pins_usif_spi_di),
1282 GRP_MUX("usif spi_do", USIF, xrx300_pins_usif_spi_do),
1283 GRP_MUX("usif spi_clk", USIF, xrx300_pins_usif_spi_clk),
1284 GRP_MUX("usif spi_cs0", USIF, xrx300_pins_usif_spi_cs0),
1285 GRP_MUX("stp", STP, xrx300_pins_stp),
1286 GRP_MUX("clkout2", CGU, xrx300_pins_clkout2),
1287 GRP_MUX("mdio", MDIO, xrx300_pins_mdio),
1288 GRP_MUX("dfe led0", DFE, xrx300_pins_dfe_led0),
1289 GRP_MUX("dfe led1", DFE, xrx300_pins_dfe_led1),
1290 GRP_MUX("ephy0 led0", GPHY, xrx300_pins_ephy0_led0),
1291 GRP_MUX("ephy0 led1", GPHY, xrx300_pins_ephy0_led1),
1292 GRP_MUX("ephy1 led0", GPHY, xrx300_pins_ephy1_led0),
1293 GRP_MUX("ephy1 led1", GPHY, xrx300_pins_ephy1_led1),