Lines Matching refs:val
222 u32 val;
226 val = readl(U300_PIN_REG(offset, dor));
228 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
230 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
239 u32 val;
242 val = readl(U300_PIN_REG(offset, pcr));
244 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1));
245 writel(val, U300_PIN_REG(offset, pcr));
256 u32 val;
259 val = readl(U300_PIN_REG(offset, pcr));
264 oldmode = val & (U300_GPIO_PXPCR_PIN_MODE_MASK <<
268 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK <<
270 val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL
272 writel(val, U300_PIN_REG(offset, pcr));
344 u32 val;
350 val = readl(U300_PIN_REG(offset, per));
351 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
354 val = readl(U300_PIN_REG(offset, per));
355 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
358 val = readl(U300_PIN_REG(offset, pcr));
359 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
361 val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_PUSH_PULL
363 writel(val, U300_PIN_REG(offset, pcr));
366 val = readl(U300_PIN_REG(offset, pcr));
367 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
369 val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_DRAIN
371 writel(val, U300_PIN_REG(offset, pcr));
374 val = readl(U300_PIN_REG(offset, pcr));
375 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
377 val |= (U300_GPIO_PXPCR_PIN_MODE_OUTPUT_OPEN_SOURCE
379 writel(val, U300_PIN_REG(offset, pcr));
403 u32 val;
405 val = readl(U300_PIN_REG(offset, icr));
409 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
414 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
426 u32 val;
443 val = readl(U300_PIN_REG(offset, icr));
444 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
449 val = readl(U300_PIN_REG(offset, icr));
450 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
463 u32 val;
469 val = readl(U300_PIN_REG(offset, ien));
470 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
479 u32 val;
483 val = readl(U300_PIN_REG(offset, ien));
484 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
503 unsigned long val;
508 val = readl(U300_PIN_REG(pinoffset, iev));
510 val &= 0xFFU; /* 8 bits per port */
512 writel(val, U300_PIN_REG(pinoffset, iev));
515 if (val != 0) {
518 for_each_set_bit(irqoffset, &val, U300_GPIO_PINS_PER_PORT) {
621 u32 val;
664 val = readl(gpio->base + U300_GPIO_CR);
667 ((val & 0x000001FC) >> 2),
668 ((val & 0x0000FE00) >> 9),
669 ((val & 0x0000FE00) >> 9) * 8);