Lines Matching refs:offset
89 * its context. It calculates the port offset from the given pin
90 * offset, muliplies by the port stride and adds the register offset
211 static int u300_gpio_get(struct gpio_chip *chip, unsigned offset)
215 return !!(readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset));
218 static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
226 val = readl(U300_PIN_REG(offset, dor));
228 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
230 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor));
235 static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
242 val = readl(U300_PIN_REG(offset, pcr));
244 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1));
245 writel(val, U300_PIN_REG(offset, pcr));
250 static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
259 val = readl(U300_PIN_REG(offset, pcr));
265 ((offset & 0x07) << 1));
269 ((offset & 0x07) << 1));
271 << ((offset & 0x07) << 1));
272 writel(val, U300_PIN_REG(offset, pcr));
274 u300_gpio_set(chip, offset, value);
281 unsigned offset,
290 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset));
293 drmode = readl(U300_PIN_REG(offset, pcr));
294 drmode &= (U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1));
295 drmode >>= ((offset & 0x07) << 1);
339 int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset,
350 val = readl(U300_PIN_REG(offset, per));
351 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
354 val = readl(U300_PIN_REG(offset, per));
355 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
358 val = readl(U300_PIN_REG(offset, pcr));
360 << ((offset & 0x07) << 1));
362 << ((offset & 0x07) << 1));
363 writel(val, U300_PIN_REG(offset, pcr));
366 val = readl(U300_PIN_REG(offset, pcr));
368 << ((offset & 0x07) << 1));
370 << ((offset & 0x07) << 1));
371 writel(val, U300_PIN_REG(offset, pcr));
374 val = readl(U300_PIN_REG(offset, pcr));
376 << ((offset & 0x07) << 1));
378 << ((offset & 0x07) << 1));
379 writel(val, U300_PIN_REG(offset, pcr));
401 static void u300_toggle_trigger(struct u300_gpio *gpio, unsigned offset)
405 val = readl(U300_PIN_REG(offset, icr));
407 if (u300_gpio_get(&gpio->chip, offset)) {
409 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
411 offset);
414 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
416 offset);
425 int offset = d->hwirq;
437 offset);
438 port->toggle_edge_mode |= U300_PIN_BIT(offset);
439 u300_toggle_trigger(gpio, offset);
442 offset);
443 val = readl(U300_PIN_REG(offset, icr));
444 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
445 port->toggle_edge_mode &= ~U300_PIN_BIT(offset);
448 offset);
449 val = readl(U300_PIN_REG(offset, icr));
450 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr));
451 port->toggle_edge_mode &= ~U300_PIN_BIT(offset);
462 int offset = d->hwirq;
466 dev_dbg(gpio->dev, "enable IRQ for hwirq %lu on port %s, offset %d\n",
467 d->hwirq, port->name, offset);
469 val = readl(U300_PIN_REG(offset, ien));
470 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
478 int offset = d->hwirq;
483 val = readl(U300_PIN_REG(offset, ien));
484 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien));
519 int offset = pinoffset + irqoffset;
520 int pin_irq = irq_find_mapping(chip->irq.domain, offset);
523 pin_irq, offset);
529 if (port->toggle_edge_mode & U300_PIN_BIT(offset))
530 u300_toggle_trigger(gpio, offset);
538 int offset,
543 u300_gpio_direction_output(&gpio->chip, offset, conf->outval);
546 u300_gpio_config_set(&gpio->chip, offset,
550 u300_gpio_config_set(&gpio->chip, offset,
554 offset, conf->outval);
556 u300_gpio_direction_input(&gpio->chip, offset);
559 u300_gpio_set(&gpio->chip, offset, 0);
562 u300_gpio_config_set(&gpio->chip, offset, conf->bias_mode);
565 offset, conf->bias_mode);
577 int offset = (i*8) + j;
580 u300_gpio_init_pin(gpio, offset, conf);
591 unsigned int offset;
595 #define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
717 p->offset, p->pin_base, 1);